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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
ec6347bb43
In reaction to a proposal to introduce a memcpy_mcsafe_fast() implementation Linus points out that memcpy_mcsafe() is poorly named relative to communicating the scope of the interface. Specifically what addresses are valid to pass as source, destination, and what faults / exceptions are handled. Of particular concern is that even though x86 might be able to handle the semantics of copy_mc_to_user() with its common copy_user_generic() implementation other archs likely need / want an explicit path for this case: On Fri, May 1, 2020 at 11:28 AM Linus Torvalds <torvalds@linux-foundation.org> wrote: > > On Thu, Apr 30, 2020 at 6:21 PM Dan Williams <dan.j.williams@intel.com> wrote: > > > > However now I see that copy_user_generic() works for the wrong reason. > > It works because the exception on the source address due to poison > > looks no different than a write fault on the user address to the > > caller, it's still just a short copy. So it makes copy_to_user() work > > for the wrong reason relative to the name. > > Right. > > And it won't work that way on other architectures. On x86, we have a > generic function that can take faults on either side, and we use it > for both cases (and for the "in_user" case too), but that's an > artifact of the architecture oddity. > > In fact, it's probably wrong even on x86 - because it can hide bugs - > but writing those things is painful enough that everybody prefers > having just one function. Replace a single top-level memcpy_mcsafe() with either copy_mc_to_user(), or copy_mc_to_kernel(). Introduce an x86 copy_mc_fragile() name as the rename for the low-level x86 implementation formerly named memcpy_mcsafe(). It is used as the slow / careful backend that is supplanted by a fast copy_mc_generic() in a follow-on patch. One side-effect of this reorganization is that separating copy_mc_64.S to its own file means that perf no longer needs to track dependencies for its memcpy_64.S benchmarks. [ bp: Massage a bit. ] Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Tony Luck <tony.luck@intel.com> Acked-by: Michael Ellerman <mpe@ellerman.id.au> Cc: <stable@vger.kernel.org> Link: http://lore.kernel.org/r/CAHk-=wjSqtXAqfUJxFtWNwmguFASTgB0dz1dT3V-78Quiezqbg@mail.gmail.com Link: https://lkml.kernel.org/r/160195561680.2163339.11574962055305783722.stgit@dwillia2-desk3.amr.corp.intel.com
243 lines
4.1 KiB
ArmAsm
243 lines
4.1 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) IBM Corporation, 2011
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* Derived from copyuser_power7.s by Anton Blanchard <anton@au.ibm.com>
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* Author - Balbir Singh <bsingharora@gmail.com>
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*/
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#include <asm/ppc_asm.h>
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#include <asm/errno.h>
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#include <asm/export.h>
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.macro err1
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100:
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EX_TABLE(100b,.Ldo_err1)
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.endm
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.macro err2
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200:
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EX_TABLE(200b,.Ldo_err2)
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.endm
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.macro err3
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300: EX_TABLE(300b,.Ldone)
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.endm
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.Ldo_err2:
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ld r22,STK_REG(R22)(r1)
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ld r21,STK_REG(R21)(r1)
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ld r20,STK_REG(R20)(r1)
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ld r19,STK_REG(R19)(r1)
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ld r18,STK_REG(R18)(r1)
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ld r17,STK_REG(R17)(r1)
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ld r16,STK_REG(R16)(r1)
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ld r15,STK_REG(R15)(r1)
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ld r14,STK_REG(R14)(r1)
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addi r1,r1,STACKFRAMESIZE
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.Ldo_err1:
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/* Do a byte by byte copy to get the exact remaining size */
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mtctr r7
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46:
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err3; lbz r0,0(r4)
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addi r4,r4,1
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err3; stb r0,0(r3)
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addi r3,r3,1
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bdnz 46b
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li r3,0
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blr
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.Ldone:
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mfctr r3
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blr
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_GLOBAL(copy_mc_generic)
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mr r7,r5
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cmpldi r5,16
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blt .Lshort_copy
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.Lcopy:
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/* Get the source 8B aligned */
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neg r6,r4
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mtocrf 0x01,r6
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clrldi r6,r6,(64-3)
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bf cr7*4+3,1f
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err1; lbz r0,0(r4)
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addi r4,r4,1
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err1; stb r0,0(r3)
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addi r3,r3,1
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subi r7,r7,1
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1: bf cr7*4+2,2f
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err1; lhz r0,0(r4)
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addi r4,r4,2
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err1; sth r0,0(r3)
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addi r3,r3,2
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subi r7,r7,2
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2: bf cr7*4+1,3f
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err1; lwz r0,0(r4)
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addi r4,r4,4
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err1; stw r0,0(r3)
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addi r3,r3,4
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subi r7,r7,4
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3: sub r5,r5,r6
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cmpldi r5,128
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mflr r0
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stdu r1,-STACKFRAMESIZE(r1)
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std r14,STK_REG(R14)(r1)
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std r15,STK_REG(R15)(r1)
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std r16,STK_REG(R16)(r1)
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std r17,STK_REG(R17)(r1)
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std r18,STK_REG(R18)(r1)
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std r19,STK_REG(R19)(r1)
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std r20,STK_REG(R20)(r1)
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std r21,STK_REG(R21)(r1)
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std r22,STK_REG(R22)(r1)
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std r0,STACKFRAMESIZE+16(r1)
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blt 5f
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srdi r6,r5,7
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mtctr r6
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/* Now do cacheline (128B) sized loads and stores. */
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.align 5
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4:
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err2; ld r0,0(r4)
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err2; ld r6,8(r4)
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err2; ld r8,16(r4)
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err2; ld r9,24(r4)
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err2; ld r10,32(r4)
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err2; ld r11,40(r4)
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err2; ld r12,48(r4)
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err2; ld r14,56(r4)
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err2; ld r15,64(r4)
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err2; ld r16,72(r4)
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err2; ld r17,80(r4)
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err2; ld r18,88(r4)
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err2; ld r19,96(r4)
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err2; ld r20,104(r4)
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err2; ld r21,112(r4)
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err2; ld r22,120(r4)
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addi r4,r4,128
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err2; std r0,0(r3)
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err2; std r6,8(r3)
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err2; std r8,16(r3)
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err2; std r9,24(r3)
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err2; std r10,32(r3)
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err2; std r11,40(r3)
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err2; std r12,48(r3)
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err2; std r14,56(r3)
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err2; std r15,64(r3)
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err2; std r16,72(r3)
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err2; std r17,80(r3)
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err2; std r18,88(r3)
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err2; std r19,96(r3)
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err2; std r20,104(r3)
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err2; std r21,112(r3)
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err2; std r22,120(r3)
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addi r3,r3,128
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subi r7,r7,128
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bdnz 4b
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clrldi r5,r5,(64-7)
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/* Up to 127B to go */
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5: srdi r6,r5,4
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mtocrf 0x01,r6
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6: bf cr7*4+1,7f
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err2; ld r0,0(r4)
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err2; ld r6,8(r4)
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err2; ld r8,16(r4)
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err2; ld r9,24(r4)
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err2; ld r10,32(r4)
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err2; ld r11,40(r4)
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err2; ld r12,48(r4)
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err2; ld r14,56(r4)
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addi r4,r4,64
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err2; std r0,0(r3)
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err2; std r6,8(r3)
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err2; std r8,16(r3)
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err2; std r9,24(r3)
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err2; std r10,32(r3)
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err2; std r11,40(r3)
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err2; std r12,48(r3)
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err2; std r14,56(r3)
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addi r3,r3,64
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subi r7,r7,64
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7: ld r14,STK_REG(R14)(r1)
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ld r15,STK_REG(R15)(r1)
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ld r16,STK_REG(R16)(r1)
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ld r17,STK_REG(R17)(r1)
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ld r18,STK_REG(R18)(r1)
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ld r19,STK_REG(R19)(r1)
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ld r20,STK_REG(R20)(r1)
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ld r21,STK_REG(R21)(r1)
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ld r22,STK_REG(R22)(r1)
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addi r1,r1,STACKFRAMESIZE
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/* Up to 63B to go */
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bf cr7*4+2,8f
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err1; ld r0,0(r4)
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err1; ld r6,8(r4)
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err1; ld r8,16(r4)
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err1; ld r9,24(r4)
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addi r4,r4,32
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err1; std r0,0(r3)
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err1; std r6,8(r3)
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err1; std r8,16(r3)
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err1; std r9,24(r3)
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addi r3,r3,32
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subi r7,r7,32
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/* Up to 31B to go */
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8: bf cr7*4+3,9f
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err1; ld r0,0(r4)
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err1; ld r6,8(r4)
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addi r4,r4,16
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err1; std r0,0(r3)
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err1; std r6,8(r3)
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addi r3,r3,16
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subi r7,r7,16
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9: clrldi r5,r5,(64-4)
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/* Up to 15B to go */
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.Lshort_copy:
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mtocrf 0x01,r5
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bf cr7*4+0,12f
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err1; lwz r0,0(r4) /* Less chance of a reject with word ops */
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err1; lwz r6,4(r4)
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addi r4,r4,8
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err1; stw r0,0(r3)
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err1; stw r6,4(r3)
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addi r3,r3,8
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subi r7,r7,8
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12: bf cr7*4+1,13f
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err1; lwz r0,0(r4)
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addi r4,r4,4
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err1; stw r0,0(r3)
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addi r3,r3,4
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subi r7,r7,4
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13: bf cr7*4+2,14f
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err1; lhz r0,0(r4)
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addi r4,r4,2
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err1; sth r0,0(r3)
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addi r3,r3,2
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subi r7,r7,2
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14: bf cr7*4+3,15f
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err1; lbz r0,0(r4)
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err1; stb r0,0(r3)
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15: li r3,0
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blr
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EXPORT_SYMBOL_GPL(copy_mc_generic);
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