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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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f8ce25476d
This is needs to be visible to other architectures using the AMBA bus and peripherals. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
62 lines
1.2 KiB
C
62 lines
1.2 KiB
C
/*
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* Copied from linux/include/asm-arm/arch-sa1100/system.h
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* Copyright (c) 1999 Nicolas Pitre <nico@cam.org>
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*/
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#ifndef __ASM_ARCH_SYSTEM_H
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#define __ASM_ARCH_SYSTEM_H
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#include <linux/config.h>
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#include <linux/clk.h>
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#include <asm/mach-types.h>
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#include <asm/hardware.h>
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#include <asm/arch/prcm.h>
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#ifndef CONFIG_MACH_VOICEBLUE
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#define voiceblue_reset() do {} while (0)
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#endif
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static inline void arch_idle(void)
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{
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cpu_do_idle();
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}
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static inline void omap1_arch_reset(char mode)
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{
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/*
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* Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
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* "Global Software Reset Affects Traffic Controller Frequency".
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*/
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if (cpu_is_omap5912()) {
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omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4),
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DPLL_CTL);
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omap_writew(0x8, ARM_RSTCT1);
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}
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if (machine_is_voiceblue())
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voiceblue_reset();
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else
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omap_writew(1, ARM_RSTCT1);
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}
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static inline void omap2_arch_reset(char mode)
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{
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u32 rate;
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struct clk *vclk, *sclk;
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vclk = clk_get(NULL, "virt_prcm_set");
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sclk = clk_get(NULL, "sys_ck");
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rate = clk_get_rate(sclk);
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clk_set_rate(vclk, rate); /* go to bypass for OMAP limitation */
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RM_RSTCTRL_WKUP |= 2;
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}
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static inline void arch_reset(char mode)
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{
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if (!cpu_is_omap24xx())
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omap1_arch_reset(mode);
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else
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omap2_arch_reset(mode);
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}
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#endif
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