Lubomir Rintel de17be999c clk: mmp2: Fix bit masks for LCDC I/O and pixel clocks ... They were reversed because I read the datasheet upside down. Actually there is no datasheet, but I ended up understanding the comments in Open Firmware driver wrong. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Link: https://lkml.kernel.org/r/20200309194254.29009-18-lkundrak@v3.sk Signed-off-by: Stephen Boyd <sboyd@kernel.org>		2020-03-20 18:19:41 -07:00
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clk-apbc.c
clk-apmu.c
clk-frac.c
clk-gate.c
clk-mix.c	clk: mmp2: Constify some strings	2020-03-20 18:19:30 -07:00
clk-mmp2.c
clk-of-mmp2.c	clk: mmp2: Fix bit masks for LCDC I/O and pixel clocks	2020-03-20 18:19:41 -07:00
clk-of-pxa168.c
clk-of-pxa910.c
clk-of-pxa1928.c
clk-pll.c	clk: mmp2: Add support for PLL clock sources	2020-03-20 18:19:31 -07:00
clk-pxa168.c
clk-pxa910.c
clk.c	clk: mmp2: Add support for PLL clock sources	2020-03-20 18:19:31 -07:00
clk.h	clk: mmp2: Add support for PLL clock sources	2020-03-20 18:19:31 -07:00
Makefile	clk: mmp2: Add support for PLL clock sources	2020-03-20 18:19:31 -07:00
reset.c
reset.h