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On some davinci SoCs, we need to register the PSC clocks during early boot because they are needed for clocksource/clockevent. These changes allow for dev == NULL because in this case, we won't have a platform device for the clocks. Signed-off-by: David Lechner <david@lechnology.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20180525181150.17873-9-david@lechnology.com
82 lines
3.2 KiB
C
82 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* PSC clock descriptions for TI DaVinci DM646x
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*
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* Copyright (C) 2018 David Lechner <david@lechnology.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/clk/davinci.h>
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include "psc.h"
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LPSC_CLKDEV1(ide_clkdev, NULL, "palm_bk3710");
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LPSC_CLKDEV2(emac_clkdev, NULL, "davinci_emac.1",
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"fck", "davinci_mdio.0");
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LPSC_CLKDEV1(aemif_clkdev, "aemif", NULL);
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LPSC_CLKDEV1(mcasp0_clkdev, NULL, "davinci-mcasp.0");
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LPSC_CLKDEV1(mcasp1_clkdev, NULL, "davinci-mcasp.1");
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LPSC_CLKDEV1(uart0_clkdev, NULL, "serial8250.0");
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LPSC_CLKDEV1(uart1_clkdev, NULL, "serial8250.1");
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LPSC_CLKDEV1(uart2_clkdev, NULL, "serial8250.2");
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LPSC_CLKDEV1(i2c_clkdev, NULL, "i2c_davinci.1");
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/* REVISIT: gpio-davinci.c should be modified to drop con_id */
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LPSC_CLKDEV1(gpio_clkdev, "gpio", NULL);
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LPSC_CLKDEV1(timer0_clkdev, "timer0", NULL);
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static const struct davinci_lpsc_clk_info dm646x_psc_info[] = {
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LPSC(0, 0, arm, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
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/* REVISIT how to disable? */
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LPSC(1, 0, dsp, pll1_sysclk1, NULL, LPSC_ALWAYS_ENABLED),
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LPSC(4, 0, edma_cc, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
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LPSC(5, 0, edma_tc0, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
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LPSC(6, 0, edma_tc1, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
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LPSC(7, 0, edma_tc2, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
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LPSC(8, 0, edma_tc3, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
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LPSC(10, 0, ide, pll1_sysclk4, ide_clkdev, 0),
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LPSC(14, 0, emac, pll1_sysclk3, emac_clkdev, 0),
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LPSC(16, 0, vpif0, ref_clk, NULL, LPSC_ALWAYS_ENABLED),
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LPSC(17, 0, vpif1, ref_clk, NULL, LPSC_ALWAYS_ENABLED),
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LPSC(21, 0, aemif, pll1_sysclk3, aemif_clkdev, LPSC_ALWAYS_ENABLED),
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LPSC(22, 0, mcasp0, pll1_sysclk3, mcasp0_clkdev, 0),
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LPSC(23, 0, mcasp1, pll1_sysclk3, mcasp1_clkdev, 0),
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LPSC(26, 0, uart0, aux_clkin, uart0_clkdev, 0),
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LPSC(27, 0, uart1, aux_clkin, uart1_clkdev, 0),
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LPSC(28, 0, uart2, aux_clkin, uart2_clkdev, 0),
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/* REVIST: disabling hangs system */
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LPSC(29, 0, pwm0, pll1_sysclk3, NULL, LPSC_ALWAYS_ENABLED),
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/* REVIST: disabling hangs system */
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LPSC(30, 0, pwm1, pll1_sysclk3, NULL, LPSC_ALWAYS_ENABLED),
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LPSC(31, 0, i2c, pll1_sysclk3, i2c_clkdev, 0),
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LPSC(33, 0, gpio, pll1_sysclk3, gpio_clkdev, 0),
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LPSC(34, 0, timer0, pll1_sysclk3, timer0_clkdev, LPSC_ALWAYS_ENABLED),
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LPSC(35, 0, timer1, pll1_sysclk3, NULL, 0),
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{ }
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};
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int dm646x_psc_init(struct device *dev, void __iomem *base)
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{
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return davinci_psc_register_clocks(dev, dm646x_psc_info, 46, base);
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}
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static struct clk_bulk_data dm646x_psc_parent_clks[] = {
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{ .id = "ref_clk" },
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{ .id = "aux_clkin" },
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{ .id = "pll1_sysclk1" },
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{ .id = "pll1_sysclk2" },
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{ .id = "pll1_sysclk3" },
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{ .id = "pll1_sysclk4" },
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{ .id = "pll1_sysclk5" },
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};
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const struct davinci_psc_init_data dm646x_psc_init_data = {
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.parent_clks = dm646x_psc_parent_clks,
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.num_parent_clks = ARRAY_SIZE(dm646x_psc_parent_clks),
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.psc_init = &dm646x_psc_init,
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};
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