mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 03:56:44 +07:00
49148020bc
Merge header files for m68k and m68knommu to the single location:
arch/m68k/include/asm
The majority of this patch was the result of the
script that is included in the changelog below.
The script was originally written by Arnd Bergman and
exten by me to cover a few more files.
When the header files differed the script uses the following:
The original m68k file is named <file>_mm.h [mm for memory manager]
The m68knommu file is named <file>_no.h [no for no memory manager]
The files uses the following include guard:
This include gaurd works as the m68knommu toolchain set
the __uClinux__ symbol - so this should work in userspace too.
Merging the header files for m68k and m68knommu exposes the
(unexpected?) ABI differences thus it is easier to actually
identify these and thus to fix them.
The commit has been build tested with both a m68k and
a m68knommu toolchain - with success.
The commit has also been tested with "make headers_check"
and this patch fixes make headers_check for m68knommu.
The script used:
TARGET=arch/m68k/include/asm
SOURCE=arch/m68knommu/include/asm
INCLUDE="cachectl.h errno.h fcntl.h hwtest.h ioctls.h ipcbuf.h \
linkage.h math-emu.h md.h mman.h movs.h msgbuf.h openprom.h \
oplib.h poll.h posix_types.h resource.h rtc.h sembuf.h shmbuf.h \
shm.h shmparam.h socket.h sockios.h spinlock.h statfs.h stat.h \
termbits.h termios.h tlb.h types.h user.h"
EQUAL="auxvec.h cputime.h device.h emergency-restart.h futex.h \
ioctl.h irq_regs.h kdebug.h local.h mutex.h percpu.h \
sections.h topology.h"
NOMUUFILES="anchor.h bootstd.h coldfire.h commproc.h dbg.h \
elia.h flat.h m5206sim.h m520xsim.h m523xsim.h m5249sim.h \
m5272sim.h m527xsim.h m528xsim.h m5307sim.h m532xsim.h \
m5407sim.h m68360_enet.h m68360.h m68360_pram.h m68360_quicc.h \
m68360_regs.h MC68328.h MC68332.h MC68EZ328.h MC68VZ328.h \
mcfcache.h mcfdma.h mcfmbus.h mcfne.h mcfpci.h mcfpit.h \
mcfsim.h mcfsmc.h mcftimer.h mcfuart.h mcfwdebug.h \
nettel.h quicc_simple.h smp.h"
FILES="atomic.h bitops.h bootinfo.h bug.h bugs.h byteorder.h cache.h \
cacheflush.h checksum.h current.h delay.h div64.h \
dma-mapping.h dma.h elf.h entry.h fb.h fpu.h hardirq.h hw_irq.h io.h \
irq.h kmap_types.h machdep.h mc146818rtc.h mmu.h mmu_context.h \
module.h page.h page_offset.h param.h pci.h pgalloc.h \
pgtable.h processor.h ptrace.h scatterlist.h segment.h \
setup.h sigcontext.h siginfo.h signal.h string.h system.h swab.h \
thread_info.h timex.h tlbflush.h traps.h uaccess.h ucontext.h \
unaligned.h unistd.h"
mergefile() {
BASE=${1%.h}
git mv ${SOURCE}/$1 ${TARGET}/${BASE}_no.h
git mv ${TARGET}/$1 ${TARGET}/${BASE}_mm.h
cat << EOF > ${TARGET}/$1
EOF
git add ${TARGET}/$1
}
set -e
mkdir -p ${TARGET}
git mv include/asm-m68k/* ${TARGET}
rmdir include/asm-m68k
git rm ${SOURCE}/Kbuild
for F in $INCLUDE $EQUAL; do
git rm ${SOURCE}/$F
done
for F in $NOMUUFILES; do
git mv ${SOURCE}/$F ${TARGET}/$F
done
for F in $FILES ; do
mergefile $F
done
rmdir arch/m68knommu/include/asm
rmdir arch/m68knommu/include
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
75 lines
2.6 KiB
C
75 lines
2.6 KiB
C
/****************************************************************************/
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/*
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* m527xsim.h -- ColdFire 5270/5271 System Integration Module support.
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*
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* (C) Copyright 2004, Greg Ungerer (gerg@snapgear.com)
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*/
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/****************************************************************************/
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#ifndef m527xsim_h
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#define m527xsim_h
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/****************************************************************************/
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/*
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* Define the 5270/5271 SIM register set addresses.
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*/
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#define MCFICM_INTC0 0x0c00 /* Base for Interrupt Ctrl 0 */
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#define MCFICM_INTC1 0x0d00 /* Base for Interrupt Ctrl 1 */
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#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
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#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
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#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
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#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */
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#define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */
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#define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */
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#define MCFINTC_IRLR 0x18 /* */
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#define MCFINTC_IACKL 0x19 /* */
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#define MCFINTC_ICR0 0x40 /* Base ICR register */
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#define MCFINT_VECBASE 64 /* Vector base number */
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#define MCFINT_UART0 13 /* Interrupt number for UART0 */
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#define MCFINT_UART1 14 /* Interrupt number for UART1 */
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#define MCFINT_UART2 15 /* Interrupt number for UART2 */
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#define MCFINT_PIT1 36 /* Interrupt number for PIT1 */
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/*
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* SDRAM configuration registers.
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*/
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#ifdef CONFIG_M5271
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#define MCFSIM_DCR 0x40 /* SDRAM control */
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#define MCFSIM_DACR0 0x48 /* SDRAM base address 0 */
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#define MCFSIM_DMR0 0x4c /* SDRAM address mask 0 */
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#define MCFSIM_DACR1 0x50 /* SDRAM base address 1 */
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#define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */
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#endif
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#ifdef CONFIG_M5275
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#define MCFSIM_DMR 0x40 /* SDRAM mode */
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#define MCFSIM_DCR 0x44 /* SDRAM control */
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#define MCFSIM_DCFG1 0x48 /* SDRAM configuration 1 */
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#define MCFSIM_DCFG2 0x4c /* SDRAM configuration 2 */
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#define MCFSIM_DBAR0 0x50 /* SDRAM base address 0 */
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#define MCFSIM_DMR0 0x54 /* SDRAM address mask 0 */
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#define MCFSIM_DBAR1 0x58 /* SDRAM base address 1 */
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#define MCFSIM_DMR1 0x5c /* SDRAM address mask 1 */
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#endif
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/*
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* GPIO pins setups to enable the UARTs.
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*/
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#ifdef CONFIG_M5271
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#define MCF_GPIO_PAR_UART 0x100048 /* PAR UART address */
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#define UART0_ENABLE_MASK 0x000f
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#define UART1_ENABLE_MASK 0x0ff0
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#define UART2_ENABLE_MASK 0x3000
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#endif
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#ifdef CONFIG_M5275
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#define MCF_GPIO_PAR_UART 0x10007c /* PAR UART address */
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#define UART0_ENABLE_MASK 0x000f
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#define UART1_ENABLE_MASK 0x00f0
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#define UART2_ENABLE_MASK 0x3f00
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#endif
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/****************************************************************************/
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#endif /* m527xsim_h */
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