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a03c60178c
struct nand_ecc_caps was designed as flexible as possible to support multiple stepsizes (like sunxi_nand.c). So, we need to write multiple arrays even for the simplest case. I guess many controllers support a single stepsize, so here is a shorthand macro for the case. It allows to describe like ... NAND_ECC_CAPS_SINGLE(denali_pci_ecc_caps, denali_calc_ecc_bytes, 512, 8, 15); ... instead of static const int denali_pci_ecc_strengths[] = {8, 15}; static const struct nand_ecc_step_info denali_pci_ecc_stepinfo = { .stepsize = 512, .strengths = denali_pci_ecc_strengths, .nstrengths = ARRAY_SIZE(denali_pci_ecc_strengths), }; static const struct nand_ecc_caps denali_pci_ecc_caps = { .stepinfos = &denali_pci_ecc_stepinfo, .nstepinfos = 1, .calc_ecc_bytes = denali_calc_ecc_bytes, }; Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> |
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bbm.h | ||
blktrans.h | ||
cfi_endian.h | ||
cfi.h | ||
concat.h | ||
doc2000.h | ||
flashchip.h | ||
ftl.h | ||
gen_probe.h | ||
inftl.h | ||
latch-addr-flash.h | ||
lpc32xx_mlc.h | ||
lpc32xx_slc.h | ||
map.h | ||
mtd.h | ||
mtdram.h | ||
nand_bch.h | ||
nand_ecc.h | ||
nand-gpio.h | ||
nand.h | ||
ndfc.h | ||
nftl.h | ||
onenand_regs.h | ||
onenand.h | ||
partitions.h | ||
pfow.h | ||
physmap.h | ||
pismo.h | ||
plat-ram.h | ||
qinfo.h | ||
sh_flctl.h | ||
sharpsl.h | ||
spear_smi.h | ||
spi-nor.h | ||
super.h | ||
ubi.h | ||
xip.h |