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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-06 02:36:40 +07:00
e6b5be2be4
Here's the set of driver core patches for 3.19-rc1. They are dominated by the removal of the .owner field in platform drivers. They touch a lot of files, but they are "simple" changes, just removing a line in a structure. Other than that, a few minor driver core and debugfs changes. There are some ath9k patches coming in through this tree that have been acked by the wireless maintainers as they relied on the debugfs changes. Everything has been in linux-next for a while. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iEYEABECAAYFAlSOD20ACgkQMUfUDdst+ylLPACg2QrW1oHhdTMT9WI8jihlHVRM 53kAoLeteByQ3iVwWurwwseRPiWa8+MI =OVRS -----END PGP SIGNATURE----- Merge tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core Pull driver core update from Greg KH: "Here's the set of driver core patches for 3.19-rc1. They are dominated by the removal of the .owner field in platform drivers. They touch a lot of files, but they are "simple" changes, just removing a line in a structure. Other than that, a few minor driver core and debugfs changes. There are some ath9k patches coming in through this tree that have been acked by the wireless maintainers as they relied on the debugfs changes. Everything has been in linux-next for a while" * tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (324 commits) Revert "ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries" fs: debugfs: add forward declaration for struct device type firmware class: Deletion of an unnecessary check before the function call "vunmap" firmware loader: fix hung task warning dump devcoredump: provide a one-way disable function device: Add dev_<level>_once variants ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries ath: use seq_file api for ath9k debugfs files debugfs: add helper function to create device related seq_file drivers/base: cacheinfo: remove noisy error boot message Revert "core: platform: add warning if driver has no owner" drivers: base: support cpu cache information interface to userspace via sysfs drivers: base: add cpu_device_create to support per-cpu devices topology: replace custom attribute macros with standard DEVICE_ATTR* cpumask: factor out show_cpumap into separate helper function driver core: Fix unbalanced device reference in drivers_probe driver core: fix race with userland in device_add() sysfs/kernfs: make read requests on pre-alloc files use the buffer. sysfs/kernfs: allow attributes to request write buffer be pre-allocated. fs: sysfs: return EGBIG on write if offset is larger than file size ...
733 lines
19 KiB
C
733 lines
19 KiB
C
/*
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* TI OMAP Real Time Clock interface for Linux
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*
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* Copyright (C) 2003 MontaVista Software, Inc.
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* Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
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*
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* Copyright (C) 2006 David Brownell (new RTC framework)
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* Copyright (C) 2014 Johan Hovold <johan@kernel.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/delay.h>
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#include <linux/rtc.h>
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#include <linux/bcd.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/io.h>
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/*
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* The OMAP RTC is a year/month/day/hours/minutes/seconds BCD clock
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* with century-range alarm matching, driven by the 32kHz clock.
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*
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* The main user-visible ways it differs from PC RTCs are by omitting
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* "don't care" alarm fields and sub-second periodic IRQs, and having
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* an autoadjust mechanism to calibrate to the true oscillator rate.
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*
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* Board-specific wiring options include using split power mode with
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* RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
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* and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
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* low power modes) for OMAP1 boards (OMAP-L138 has this built into
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* the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
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*/
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/* RTC registers */
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#define OMAP_RTC_SECONDS_REG 0x00
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#define OMAP_RTC_MINUTES_REG 0x04
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#define OMAP_RTC_HOURS_REG 0x08
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#define OMAP_RTC_DAYS_REG 0x0C
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#define OMAP_RTC_MONTHS_REG 0x10
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#define OMAP_RTC_YEARS_REG 0x14
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#define OMAP_RTC_WEEKS_REG 0x18
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#define OMAP_RTC_ALARM_SECONDS_REG 0x20
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#define OMAP_RTC_ALARM_MINUTES_REG 0x24
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#define OMAP_RTC_ALARM_HOURS_REG 0x28
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#define OMAP_RTC_ALARM_DAYS_REG 0x2c
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#define OMAP_RTC_ALARM_MONTHS_REG 0x30
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#define OMAP_RTC_ALARM_YEARS_REG 0x34
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#define OMAP_RTC_CTRL_REG 0x40
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#define OMAP_RTC_STATUS_REG 0x44
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#define OMAP_RTC_INTERRUPTS_REG 0x48
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#define OMAP_RTC_COMP_LSB_REG 0x4c
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#define OMAP_RTC_COMP_MSB_REG 0x50
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#define OMAP_RTC_OSC_REG 0x54
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#define OMAP_RTC_KICK0_REG 0x6c
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#define OMAP_RTC_KICK1_REG 0x70
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#define OMAP_RTC_IRQWAKEEN 0x7c
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#define OMAP_RTC_ALARM2_SECONDS_REG 0x80
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#define OMAP_RTC_ALARM2_MINUTES_REG 0x84
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#define OMAP_RTC_ALARM2_HOURS_REG 0x88
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#define OMAP_RTC_ALARM2_DAYS_REG 0x8c
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#define OMAP_RTC_ALARM2_MONTHS_REG 0x90
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#define OMAP_RTC_ALARM2_YEARS_REG 0x94
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#define OMAP_RTC_PMIC_REG 0x98
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/* OMAP_RTC_CTRL_REG bit fields: */
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#define OMAP_RTC_CTRL_SPLIT BIT(7)
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#define OMAP_RTC_CTRL_DISABLE BIT(6)
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#define OMAP_RTC_CTRL_SET_32_COUNTER BIT(5)
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#define OMAP_RTC_CTRL_TEST BIT(4)
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#define OMAP_RTC_CTRL_MODE_12_24 BIT(3)
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#define OMAP_RTC_CTRL_AUTO_COMP BIT(2)
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#define OMAP_RTC_CTRL_ROUND_30S BIT(1)
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#define OMAP_RTC_CTRL_STOP BIT(0)
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/* OMAP_RTC_STATUS_REG bit fields: */
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#define OMAP_RTC_STATUS_POWER_UP BIT(7)
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#define OMAP_RTC_STATUS_ALARM2 BIT(7)
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#define OMAP_RTC_STATUS_ALARM BIT(6)
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#define OMAP_RTC_STATUS_1D_EVENT BIT(5)
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#define OMAP_RTC_STATUS_1H_EVENT BIT(4)
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#define OMAP_RTC_STATUS_1M_EVENT BIT(3)
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#define OMAP_RTC_STATUS_1S_EVENT BIT(2)
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#define OMAP_RTC_STATUS_RUN BIT(1)
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#define OMAP_RTC_STATUS_BUSY BIT(0)
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/* OMAP_RTC_INTERRUPTS_REG bit fields: */
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#define OMAP_RTC_INTERRUPTS_IT_ALARM2 BIT(4)
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#define OMAP_RTC_INTERRUPTS_IT_ALARM BIT(3)
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#define OMAP_RTC_INTERRUPTS_IT_TIMER BIT(2)
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/* OMAP_RTC_OSC_REG bit fields: */
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#define OMAP_RTC_OSC_32KCLK_EN BIT(6)
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/* OMAP_RTC_IRQWAKEEN bit fields: */
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#define OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN BIT(1)
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/* OMAP_RTC_PMIC bit fields: */
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#define OMAP_RTC_PMIC_POWER_EN_EN BIT(16)
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/* OMAP_RTC_KICKER values */
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#define KICK0_VALUE 0x83e70b13
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#define KICK1_VALUE 0x95a4f1e0
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struct omap_rtc_device_type {
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bool has_32kclk_en;
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bool has_kicker;
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bool has_irqwakeen;
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bool has_pmic_mode;
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bool has_power_up_reset;
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};
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struct omap_rtc {
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struct rtc_device *rtc;
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void __iomem *base;
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int irq_alarm;
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int irq_timer;
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u8 interrupts_reg;
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bool is_pmic_controller;
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const struct omap_rtc_device_type *type;
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};
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static inline u8 rtc_read(struct omap_rtc *rtc, unsigned int reg)
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{
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return readb(rtc->base + reg);
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}
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static inline u32 rtc_readl(struct omap_rtc *rtc, unsigned int reg)
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{
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return readl(rtc->base + reg);
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}
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static inline void rtc_write(struct omap_rtc *rtc, unsigned int reg, u8 val)
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{
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writeb(val, rtc->base + reg);
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}
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static inline void rtc_writel(struct omap_rtc *rtc, unsigned int reg, u32 val)
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{
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writel(val, rtc->base + reg);
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}
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/*
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* We rely on the rtc framework to handle locking (rtc->ops_lock),
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* so the only other requirement is that register accesses which
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* require BUSY to be clear are made with IRQs locally disabled
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*/
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static void rtc_wait_not_busy(struct omap_rtc *rtc)
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{
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int count;
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u8 status;
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/* BUSY may stay active for 1/32768 second (~30 usec) */
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for (count = 0; count < 50; count++) {
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status = rtc_read(rtc, OMAP_RTC_STATUS_REG);
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if (!(status & OMAP_RTC_STATUS_BUSY))
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break;
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udelay(1);
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}
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/* now we have ~15 usec to read/write various registers */
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}
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static irqreturn_t rtc_irq(int irq, void *dev_id)
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{
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struct omap_rtc *rtc = dev_id;
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unsigned long events = 0;
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u8 irq_data;
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irq_data = rtc_read(rtc, OMAP_RTC_STATUS_REG);
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/* alarm irq? */
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if (irq_data & OMAP_RTC_STATUS_ALARM) {
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rtc_write(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_ALARM);
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events |= RTC_IRQF | RTC_AF;
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}
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/* 1/sec periodic/update irq? */
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if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
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events |= RTC_IRQF | RTC_UF;
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rtc_update_irq(rtc->rtc, 1, events);
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return IRQ_HANDLED;
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}
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static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
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{
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struct omap_rtc *rtc = dev_get_drvdata(dev);
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u8 reg, irqwake_reg = 0;
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local_irq_disable();
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rtc_wait_not_busy(rtc);
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reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
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if (rtc->type->has_irqwakeen)
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irqwake_reg = rtc_read(rtc, OMAP_RTC_IRQWAKEEN);
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if (enabled) {
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reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
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irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
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} else {
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reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
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irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
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}
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rtc_wait_not_busy(rtc);
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rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
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if (rtc->type->has_irqwakeen)
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rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
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local_irq_enable();
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return 0;
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}
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/* this hardware doesn't support "don't care" alarm fields */
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static int tm2bcd(struct rtc_time *tm)
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{
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if (rtc_valid_tm(tm) != 0)
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return -EINVAL;
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tm->tm_sec = bin2bcd(tm->tm_sec);
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tm->tm_min = bin2bcd(tm->tm_min);
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tm->tm_hour = bin2bcd(tm->tm_hour);
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tm->tm_mday = bin2bcd(tm->tm_mday);
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tm->tm_mon = bin2bcd(tm->tm_mon + 1);
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/* epoch == 1900 */
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if (tm->tm_year < 100 || tm->tm_year > 199)
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return -EINVAL;
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tm->tm_year = bin2bcd(tm->tm_year - 100);
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return 0;
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}
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static void bcd2tm(struct rtc_time *tm)
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{
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tm->tm_sec = bcd2bin(tm->tm_sec);
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tm->tm_min = bcd2bin(tm->tm_min);
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tm->tm_hour = bcd2bin(tm->tm_hour);
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tm->tm_mday = bcd2bin(tm->tm_mday);
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tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
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/* epoch == 1900 */
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tm->tm_year = bcd2bin(tm->tm_year) + 100;
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}
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static void omap_rtc_read_time_raw(struct omap_rtc *rtc, struct rtc_time *tm)
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{
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tm->tm_sec = rtc_read(rtc, OMAP_RTC_SECONDS_REG);
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tm->tm_min = rtc_read(rtc, OMAP_RTC_MINUTES_REG);
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tm->tm_hour = rtc_read(rtc, OMAP_RTC_HOURS_REG);
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tm->tm_mday = rtc_read(rtc, OMAP_RTC_DAYS_REG);
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tm->tm_mon = rtc_read(rtc, OMAP_RTC_MONTHS_REG);
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tm->tm_year = rtc_read(rtc, OMAP_RTC_YEARS_REG);
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}
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static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct omap_rtc *rtc = dev_get_drvdata(dev);
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/* we don't report wday/yday/isdst ... */
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local_irq_disable();
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rtc_wait_not_busy(rtc);
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omap_rtc_read_time_raw(rtc, tm);
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local_irq_enable();
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bcd2tm(tm);
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return 0;
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}
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static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct omap_rtc *rtc = dev_get_drvdata(dev);
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if (tm2bcd(tm) < 0)
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return -EINVAL;
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local_irq_disable();
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rtc_wait_not_busy(rtc);
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rtc_write(rtc, OMAP_RTC_YEARS_REG, tm->tm_year);
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rtc_write(rtc, OMAP_RTC_MONTHS_REG, tm->tm_mon);
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rtc_write(rtc, OMAP_RTC_DAYS_REG, tm->tm_mday);
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rtc_write(rtc, OMAP_RTC_HOURS_REG, tm->tm_hour);
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rtc_write(rtc, OMAP_RTC_MINUTES_REG, tm->tm_min);
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rtc_write(rtc, OMAP_RTC_SECONDS_REG, tm->tm_sec);
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local_irq_enable();
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return 0;
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}
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static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
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{
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struct omap_rtc *rtc = dev_get_drvdata(dev);
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u8 interrupts;
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local_irq_disable();
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rtc_wait_not_busy(rtc);
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alm->time.tm_sec = rtc_read(rtc, OMAP_RTC_ALARM_SECONDS_REG);
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alm->time.tm_min = rtc_read(rtc, OMAP_RTC_ALARM_MINUTES_REG);
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alm->time.tm_hour = rtc_read(rtc, OMAP_RTC_ALARM_HOURS_REG);
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alm->time.tm_mday = rtc_read(rtc, OMAP_RTC_ALARM_DAYS_REG);
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alm->time.tm_mon = rtc_read(rtc, OMAP_RTC_ALARM_MONTHS_REG);
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alm->time.tm_year = rtc_read(rtc, OMAP_RTC_ALARM_YEARS_REG);
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local_irq_enable();
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bcd2tm(&alm->time);
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interrupts = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
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alm->enabled = !!(interrupts & OMAP_RTC_INTERRUPTS_IT_ALARM);
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return 0;
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}
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static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
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{
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struct omap_rtc *rtc = dev_get_drvdata(dev);
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u8 reg, irqwake_reg = 0;
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if (tm2bcd(&alm->time) < 0)
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return -EINVAL;
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local_irq_disable();
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rtc_wait_not_busy(rtc);
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rtc_write(rtc, OMAP_RTC_ALARM_YEARS_REG, alm->time.tm_year);
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rtc_write(rtc, OMAP_RTC_ALARM_MONTHS_REG, alm->time.tm_mon);
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rtc_write(rtc, OMAP_RTC_ALARM_DAYS_REG, alm->time.tm_mday);
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rtc_write(rtc, OMAP_RTC_ALARM_HOURS_REG, alm->time.tm_hour);
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rtc_write(rtc, OMAP_RTC_ALARM_MINUTES_REG, alm->time.tm_min);
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rtc_write(rtc, OMAP_RTC_ALARM_SECONDS_REG, alm->time.tm_sec);
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reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
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if (rtc->type->has_irqwakeen)
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irqwake_reg = rtc_read(rtc, OMAP_RTC_IRQWAKEEN);
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if (alm->enabled) {
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reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
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irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
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} else {
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reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
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irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
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}
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rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
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if (rtc->type->has_irqwakeen)
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rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
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local_irq_enable();
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return 0;
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}
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static struct omap_rtc *omap_rtc_power_off_rtc;
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/*
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* omap_rtc_poweroff: RTC-controlled power off
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*
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* The RTC can be used to control an external PMIC via the pmic_power_en pin,
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* which can be configured to transition to OFF on ALARM2 events.
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*
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* Notes:
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* The two-second alarm offset is the shortest offset possible as the alarm
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* registers must be set before the next timer update and the offset
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* calculation is too heavy for everything to be done within a single access
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* period (~15 us).
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*
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* Called with local interrupts disabled.
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*/
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static void omap_rtc_power_off(void)
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{
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struct omap_rtc *rtc = omap_rtc_power_off_rtc;
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struct rtc_time tm;
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unsigned long now;
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u32 val;
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/* enable pmic_power_en control */
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val = rtc_readl(rtc, OMAP_RTC_PMIC_REG);
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rtc_writel(rtc, OMAP_RTC_PMIC_REG, val | OMAP_RTC_PMIC_POWER_EN_EN);
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/* set alarm two seconds from now */
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omap_rtc_read_time_raw(rtc, &tm);
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bcd2tm(&tm);
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rtc_tm_to_time(&tm, &now);
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rtc_time_to_tm(now + 2, &tm);
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if (tm2bcd(&tm) < 0) {
|
|
dev_err(&rtc->rtc->dev, "power off failed\n");
|
|
return;
|
|
}
|
|
|
|
rtc_wait_not_busy(rtc);
|
|
|
|
rtc_write(rtc, OMAP_RTC_ALARM2_SECONDS_REG, tm.tm_sec);
|
|
rtc_write(rtc, OMAP_RTC_ALARM2_MINUTES_REG, tm.tm_min);
|
|
rtc_write(rtc, OMAP_RTC_ALARM2_HOURS_REG, tm.tm_hour);
|
|
rtc_write(rtc, OMAP_RTC_ALARM2_DAYS_REG, tm.tm_mday);
|
|
rtc_write(rtc, OMAP_RTC_ALARM2_MONTHS_REG, tm.tm_mon);
|
|
rtc_write(rtc, OMAP_RTC_ALARM2_YEARS_REG, tm.tm_year);
|
|
|
|
/*
|
|
* enable ALARM2 interrupt
|
|
*
|
|
* NOTE: this fails on AM3352 if rtc_write (writeb) is used
|
|
*/
|
|
val = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
|
|
rtc_writel(rtc, OMAP_RTC_INTERRUPTS_REG,
|
|
val | OMAP_RTC_INTERRUPTS_IT_ALARM2);
|
|
|
|
/*
|
|
* Wait for alarm to trigger (within two seconds) and external PMIC to
|
|
* power off the system. Add a 500 ms margin for external latencies
|
|
* (e.g. debounce circuits).
|
|
*/
|
|
mdelay(2500);
|
|
}
|
|
|
|
static struct rtc_class_ops omap_rtc_ops = {
|
|
.read_time = omap_rtc_read_time,
|
|
.set_time = omap_rtc_set_time,
|
|
.read_alarm = omap_rtc_read_alarm,
|
|
.set_alarm = omap_rtc_set_alarm,
|
|
.alarm_irq_enable = omap_rtc_alarm_irq_enable,
|
|
};
|
|
|
|
static const struct omap_rtc_device_type omap_rtc_default_type = {
|
|
.has_power_up_reset = true,
|
|
};
|
|
|
|
static const struct omap_rtc_device_type omap_rtc_am3352_type = {
|
|
.has_32kclk_en = true,
|
|
.has_kicker = true,
|
|
.has_irqwakeen = true,
|
|
.has_pmic_mode = true,
|
|
};
|
|
|
|
static const struct omap_rtc_device_type omap_rtc_da830_type = {
|
|
.has_kicker = true,
|
|
};
|
|
|
|
static const struct platform_device_id omap_rtc_id_table[] = {
|
|
{
|
|
.name = "omap_rtc",
|
|
.driver_data = (kernel_ulong_t)&omap_rtc_default_type,
|
|
}, {
|
|
.name = "am3352-rtc",
|
|
.driver_data = (kernel_ulong_t)&omap_rtc_am3352_type,
|
|
}, {
|
|
.name = "da830-rtc",
|
|
.driver_data = (kernel_ulong_t)&omap_rtc_da830_type,
|
|
}, {
|
|
/* sentinel */
|
|
}
|
|
};
|
|
MODULE_DEVICE_TABLE(platform, omap_rtc_id_table);
|
|
|
|
static const struct of_device_id omap_rtc_of_match[] = {
|
|
{
|
|
.compatible = "ti,am3352-rtc",
|
|
.data = &omap_rtc_am3352_type,
|
|
}, {
|
|
.compatible = "ti,da830-rtc",
|
|
.data = &omap_rtc_da830_type,
|
|
}, {
|
|
/* sentinel */
|
|
}
|
|
};
|
|
MODULE_DEVICE_TABLE(of, omap_rtc_of_match);
|
|
|
|
static int __init omap_rtc_probe(struct platform_device *pdev)
|
|
{
|
|
struct omap_rtc *rtc;
|
|
struct resource *res;
|
|
u8 reg, mask, new_ctrl;
|
|
const struct platform_device_id *id_entry;
|
|
const struct of_device_id *of_id;
|
|
int ret;
|
|
|
|
rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
|
|
if (!rtc)
|
|
return -ENOMEM;
|
|
|
|
of_id = of_match_device(omap_rtc_of_match, &pdev->dev);
|
|
if (of_id) {
|
|
rtc->type = of_id->data;
|
|
rtc->is_pmic_controller = rtc->type->has_pmic_mode &&
|
|
of_property_read_bool(pdev->dev.of_node,
|
|
"system-power-controller");
|
|
} else {
|
|
id_entry = platform_get_device_id(pdev);
|
|
rtc->type = (void *)id_entry->driver_data;
|
|
}
|
|
|
|
rtc->irq_timer = platform_get_irq(pdev, 0);
|
|
if (rtc->irq_timer <= 0)
|
|
return -ENOENT;
|
|
|
|
rtc->irq_alarm = platform_get_irq(pdev, 1);
|
|
if (rtc->irq_alarm <= 0)
|
|
return -ENOENT;
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
rtc->base = devm_ioremap_resource(&pdev->dev, res);
|
|
if (IS_ERR(rtc->base))
|
|
return PTR_ERR(rtc->base);
|
|
|
|
platform_set_drvdata(pdev, rtc);
|
|
|
|
/* Enable the clock/module so that we can access the registers */
|
|
pm_runtime_enable(&pdev->dev);
|
|
pm_runtime_get_sync(&pdev->dev);
|
|
|
|
if (rtc->type->has_kicker) {
|
|
rtc_writel(rtc, OMAP_RTC_KICK0_REG, KICK0_VALUE);
|
|
rtc_writel(rtc, OMAP_RTC_KICK1_REG, KICK1_VALUE);
|
|
}
|
|
|
|
/*
|
|
* disable interrupts
|
|
*
|
|
* NOTE: ALARM2 is not cleared on AM3352 if rtc_write (writeb) is used
|
|
*/
|
|
rtc_writel(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
|
|
|
|
/* enable RTC functional clock */
|
|
if (rtc->type->has_32kclk_en) {
|
|
reg = rtc_read(rtc, OMAP_RTC_OSC_REG);
|
|
rtc_writel(rtc, OMAP_RTC_OSC_REG,
|
|
reg | OMAP_RTC_OSC_32KCLK_EN);
|
|
}
|
|
|
|
/* clear old status */
|
|
reg = rtc_read(rtc, OMAP_RTC_STATUS_REG);
|
|
|
|
mask = OMAP_RTC_STATUS_ALARM;
|
|
|
|
if (rtc->type->has_pmic_mode)
|
|
mask |= OMAP_RTC_STATUS_ALARM2;
|
|
|
|
if (rtc->type->has_power_up_reset) {
|
|
mask |= OMAP_RTC_STATUS_POWER_UP;
|
|
if (reg & OMAP_RTC_STATUS_POWER_UP)
|
|
dev_info(&pdev->dev, "RTC power up reset detected\n");
|
|
}
|
|
|
|
if (reg & mask)
|
|
rtc_write(rtc, OMAP_RTC_STATUS_REG, reg & mask);
|
|
|
|
/* On boards with split power, RTC_ON_NOFF won't reset the RTC */
|
|
reg = rtc_read(rtc, OMAP_RTC_CTRL_REG);
|
|
if (reg & OMAP_RTC_CTRL_STOP)
|
|
dev_info(&pdev->dev, "already running\n");
|
|
|
|
/* force to 24 hour mode */
|
|
new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT | OMAP_RTC_CTRL_AUTO_COMP);
|
|
new_ctrl |= OMAP_RTC_CTRL_STOP;
|
|
|
|
/*
|
|
* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
|
|
*
|
|
* - Device wake-up capability setting should come through chip
|
|
* init logic. OMAP1 boards should initialize the "wakeup capable"
|
|
* flag in the platform device if the board is wired right for
|
|
* being woken up by RTC alarm. For OMAP-L138, this capability
|
|
* is built into the SoC by the "Deep Sleep" capability.
|
|
*
|
|
* - Boards wired so RTC_ON_nOFF is used as the reset signal,
|
|
* rather than nPWRON_RESET, should forcibly enable split
|
|
* power mode. (Some chip errata report that RTC_CTRL_SPLIT
|
|
* is write-only, and always reads as zero...)
|
|
*/
|
|
|
|
if (new_ctrl & OMAP_RTC_CTRL_SPLIT)
|
|
dev_info(&pdev->dev, "split power mode\n");
|
|
|
|
if (reg != new_ctrl)
|
|
rtc_write(rtc, OMAP_RTC_CTRL_REG, new_ctrl);
|
|
|
|
device_init_wakeup(&pdev->dev, true);
|
|
|
|
rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
|
|
&omap_rtc_ops, THIS_MODULE);
|
|
if (IS_ERR(rtc->rtc)) {
|
|
ret = PTR_ERR(rtc->rtc);
|
|
goto err;
|
|
}
|
|
|
|
/* handle periodic and alarm irqs */
|
|
ret = devm_request_irq(&pdev->dev, rtc->irq_timer, rtc_irq, 0,
|
|
dev_name(&rtc->rtc->dev), rtc);
|
|
if (ret)
|
|
goto err;
|
|
|
|
if (rtc->irq_timer != rtc->irq_alarm) {
|
|
ret = devm_request_irq(&pdev->dev, rtc->irq_alarm, rtc_irq, 0,
|
|
dev_name(&rtc->rtc->dev), rtc);
|
|
if (ret)
|
|
goto err;
|
|
}
|
|
|
|
if (rtc->is_pmic_controller) {
|
|
if (!pm_power_off) {
|
|
omap_rtc_power_off_rtc = rtc;
|
|
pm_power_off = omap_rtc_power_off;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
|
|
err:
|
|
device_init_wakeup(&pdev->dev, false);
|
|
if (rtc->type->has_kicker)
|
|
rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0);
|
|
pm_runtime_put_sync(&pdev->dev);
|
|
pm_runtime_disable(&pdev->dev);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int __exit omap_rtc_remove(struct platform_device *pdev)
|
|
{
|
|
struct omap_rtc *rtc = platform_get_drvdata(pdev);
|
|
|
|
if (pm_power_off == omap_rtc_power_off &&
|
|
omap_rtc_power_off_rtc == rtc) {
|
|
pm_power_off = NULL;
|
|
omap_rtc_power_off_rtc = NULL;
|
|
}
|
|
|
|
device_init_wakeup(&pdev->dev, 0);
|
|
|
|
/* leave rtc running, but disable irqs */
|
|
rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
|
|
|
|
if (rtc->type->has_kicker)
|
|
rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0);
|
|
|
|
/* Disable the clock/module */
|
|
pm_runtime_put_sync(&pdev->dev);
|
|
pm_runtime_disable(&pdev->dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int omap_rtc_suspend(struct device *dev)
|
|
{
|
|
struct omap_rtc *rtc = dev_get_drvdata(dev);
|
|
|
|
rtc->interrupts_reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
|
|
|
|
/*
|
|
* FIXME: the RTC alarm is not currently acting as a wakeup event
|
|
* source on some platforms, and in fact this enable() call is just
|
|
* saving a flag that's never used...
|
|
*/
|
|
if (device_may_wakeup(dev))
|
|
enable_irq_wake(rtc->irq_alarm);
|
|
else
|
|
rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
|
|
|
|
/* Disable the clock/module */
|
|
pm_runtime_put_sync(dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int omap_rtc_resume(struct device *dev)
|
|
{
|
|
struct omap_rtc *rtc = dev_get_drvdata(dev);
|
|
|
|
/* Enable the clock/module so that we can access the registers */
|
|
pm_runtime_get_sync(dev);
|
|
|
|
if (device_may_wakeup(dev))
|
|
disable_irq_wake(rtc->irq_alarm);
|
|
else
|
|
rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, rtc->interrupts_reg);
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static SIMPLE_DEV_PM_OPS(omap_rtc_pm_ops, omap_rtc_suspend, omap_rtc_resume);
|
|
|
|
static void omap_rtc_shutdown(struct platform_device *pdev)
|
|
{
|
|
struct omap_rtc *rtc = platform_get_drvdata(pdev);
|
|
u8 mask;
|
|
|
|
/*
|
|
* Keep the ALARM interrupt enabled to allow the system to power up on
|
|
* alarm events.
|
|
*/
|
|
mask = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
|
|
mask &= OMAP_RTC_INTERRUPTS_IT_ALARM;
|
|
rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, mask);
|
|
}
|
|
|
|
static struct platform_driver omap_rtc_driver = {
|
|
.remove = __exit_p(omap_rtc_remove),
|
|
.shutdown = omap_rtc_shutdown,
|
|
.driver = {
|
|
.name = "omap_rtc",
|
|
.pm = &omap_rtc_pm_ops,
|
|
.of_match_table = omap_rtc_of_match,
|
|
},
|
|
.id_table = omap_rtc_id_table,
|
|
};
|
|
|
|
module_platform_driver_probe(omap_rtc_driver, omap_rtc_probe);
|
|
|
|
MODULE_ALIAS("platform:omap_rtc");
|
|
MODULE_AUTHOR("George G. Davis (and others)");
|
|
MODULE_LICENSE("GPL");
|