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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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cd99758ba3
The modern idiom is to use irq_domain to allocate interrupts. This is useful partly to allow further infrastructure to be based on the domains and partly because it makes it much easier to allocate virtual interrupts to devices as we don't need to allocate a contiguous range of interrupt numbers. Convert the wm831x driver over to this infrastructure, using a legacy IRQ mapping if an irq_base is specified in platform data and otherwise using a linear mapping, always registering the interrupts even if they won't ever be used. Only boards which need to use the GPIOs as interrupts should need to use an irq_base. This means that we can't use the MFD irq_base management since the unless we're using an explicit irq_base from platform data we can't rely on a linear mapping of interrupts. Instead we need to map things via the irq_domain - provide a conveniencem function wm831x_irq() to save a small amount of typing when doing so. Looking at this I couldn't clearly see anything the MFD core could do to make this nicer. Since we're not supporting device tree yet there's no meaningful advantage if we don't do this conversion in one, the fact that the interrupt resources are used for repeated IP blocks makes accessor functions for the irq_domain more trouble to do than they're worth. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
300 lines
6.6 KiB
C
300 lines
6.6 KiB
C
/*
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* wm831x-auxadc.c -- AUXADC for Wolfson WM831x PMICs
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*
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* Copyright 2009-2011 Wolfson Microelectronics PLC.
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*
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/mfd/core.h>
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#include <linux/slab.h>
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#include <linux/list.h>
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#include <linux/mfd/wm831x/core.h>
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#include <linux/mfd/wm831x/pdata.h>
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#include <linux/mfd/wm831x/irq.h>
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#include <linux/mfd/wm831x/auxadc.h>
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#include <linux/mfd/wm831x/otp.h>
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#include <linux/mfd/wm831x/regulator.h>
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struct wm831x_auxadc_req {
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struct list_head list;
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enum wm831x_auxadc input;
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int val;
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struct completion done;
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};
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static int wm831x_auxadc_read_irq(struct wm831x *wm831x,
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enum wm831x_auxadc input)
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{
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struct wm831x_auxadc_req *req;
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int ret;
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bool ena = false;
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req = kzalloc(sizeof(*req), GFP_KERNEL);
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if (!req)
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return -ENOMEM;
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init_completion(&req->done);
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req->input = input;
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req->val = -ETIMEDOUT;
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mutex_lock(&wm831x->auxadc_lock);
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/* Enqueue the request */
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list_add(&req->list, &wm831x->auxadc_pending);
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ena = !wm831x->auxadc_active;
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if (ena) {
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ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
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WM831X_AUX_ENA, WM831X_AUX_ENA);
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if (ret != 0) {
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dev_err(wm831x->dev, "Failed to enable AUXADC: %d\n",
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ret);
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goto out;
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}
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}
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/* Enable the conversion if not already running */
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if (!(wm831x->auxadc_active & (1 << input))) {
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ret = wm831x_set_bits(wm831x, WM831X_AUXADC_SOURCE,
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1 << input, 1 << input);
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if (ret != 0) {
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dev_err(wm831x->dev,
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"Failed to set AUXADC source: %d\n", ret);
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goto out;
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}
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wm831x->auxadc_active |= 1 << input;
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}
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/* We convert at the fastest rate possible */
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if (ena) {
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ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
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WM831X_AUX_CVT_ENA |
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WM831X_AUX_RATE_MASK,
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WM831X_AUX_CVT_ENA |
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WM831X_AUX_RATE_MASK);
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if (ret != 0) {
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dev_err(wm831x->dev, "Failed to start AUXADC: %d\n",
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ret);
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goto out;
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}
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}
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mutex_unlock(&wm831x->auxadc_lock);
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/* Wait for an interrupt */
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wait_for_completion_timeout(&req->done, msecs_to_jiffies(500));
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mutex_lock(&wm831x->auxadc_lock);
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list_del(&req->list);
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ret = req->val;
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out:
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mutex_unlock(&wm831x->auxadc_lock);
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kfree(req);
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return ret;
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}
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static irqreturn_t wm831x_auxadc_irq(int irq, void *irq_data)
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{
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struct wm831x *wm831x = irq_data;
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struct wm831x_auxadc_req *req;
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int ret, input, val;
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ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA);
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if (ret < 0) {
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dev_err(wm831x->dev,
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"Failed to read AUXADC data: %d\n", ret);
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return IRQ_NONE;
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}
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input = ((ret & WM831X_AUX_DATA_SRC_MASK)
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>> WM831X_AUX_DATA_SRC_SHIFT) - 1;
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if (input == 14)
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input = WM831X_AUX_CAL;
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val = ret & WM831X_AUX_DATA_MASK;
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mutex_lock(&wm831x->auxadc_lock);
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/* Disable this conversion, we're about to complete all users */
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wm831x_set_bits(wm831x, WM831X_AUXADC_SOURCE,
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1 << input, 0);
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wm831x->auxadc_active &= ~(1 << input);
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/* Turn off the entire convertor if idle */
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if (!wm831x->auxadc_active)
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wm831x_reg_write(wm831x, WM831X_AUXADC_CONTROL, 0);
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/* Wake up any threads waiting for this request */
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list_for_each_entry(req, &wm831x->auxadc_pending, list) {
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if (req->input == input) {
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req->val = val;
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complete(&req->done);
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}
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}
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mutex_unlock(&wm831x->auxadc_lock);
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return IRQ_HANDLED;
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}
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static int wm831x_auxadc_read_polled(struct wm831x *wm831x,
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enum wm831x_auxadc input)
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{
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int ret, src, timeout;
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mutex_lock(&wm831x->auxadc_lock);
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ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
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WM831X_AUX_ENA, WM831X_AUX_ENA);
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if (ret < 0) {
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dev_err(wm831x->dev, "Failed to enable AUXADC: %d\n", ret);
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goto out;
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}
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/* We force a single source at present */
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src = input;
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ret = wm831x_reg_write(wm831x, WM831X_AUXADC_SOURCE,
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1 << src);
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if (ret < 0) {
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dev_err(wm831x->dev, "Failed to set AUXADC source: %d\n", ret);
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goto out;
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}
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ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
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WM831X_AUX_CVT_ENA, WM831X_AUX_CVT_ENA);
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if (ret < 0) {
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dev_err(wm831x->dev, "Failed to start AUXADC: %d\n", ret);
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goto disable;
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}
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/* If we're not using interrupts then poll the
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* interrupt status register */
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timeout = 5;
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while (timeout) {
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msleep(1);
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ret = wm831x_reg_read(wm831x,
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WM831X_INTERRUPT_STATUS_1);
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if (ret < 0) {
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dev_err(wm831x->dev,
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"ISR 1 read failed: %d\n", ret);
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goto disable;
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}
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/* Did it complete? */
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if (ret & WM831X_AUXADC_DATA_EINT) {
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wm831x_reg_write(wm831x,
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WM831X_INTERRUPT_STATUS_1,
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WM831X_AUXADC_DATA_EINT);
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break;
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} else {
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dev_err(wm831x->dev,
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"AUXADC conversion timeout\n");
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ret = -EBUSY;
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goto disable;
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}
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}
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ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA);
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if (ret < 0) {
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dev_err(wm831x->dev,
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"Failed to read AUXADC data: %d\n", ret);
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goto disable;
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}
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src = ((ret & WM831X_AUX_DATA_SRC_MASK)
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>> WM831X_AUX_DATA_SRC_SHIFT) - 1;
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if (src == 14)
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src = WM831X_AUX_CAL;
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if (src != input) {
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dev_err(wm831x->dev, "Data from source %d not %d\n",
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src, input);
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ret = -EINVAL;
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} else {
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ret &= WM831X_AUX_DATA_MASK;
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}
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disable:
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wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL, WM831X_AUX_ENA, 0);
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out:
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mutex_unlock(&wm831x->auxadc_lock);
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return ret;
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}
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/**
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* wm831x_auxadc_read: Read a value from the WM831x AUXADC
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*
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* @wm831x: Device to read from.
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* @input: AUXADC input to read.
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*/
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int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input)
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{
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return wm831x->auxadc_read(wm831x, input);
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}
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EXPORT_SYMBOL_GPL(wm831x_auxadc_read);
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/**
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* wm831x_auxadc_read_uv: Read a voltage from the WM831x AUXADC
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*
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* @wm831x: Device to read from.
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* @input: AUXADC input to read.
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*/
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int wm831x_auxadc_read_uv(struct wm831x *wm831x, enum wm831x_auxadc input)
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{
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int ret;
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ret = wm831x_auxadc_read(wm831x, input);
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if (ret < 0)
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return ret;
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ret *= 1465;
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return ret;
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}
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EXPORT_SYMBOL_GPL(wm831x_auxadc_read_uv);
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void wm831x_auxadc_init(struct wm831x *wm831x)
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{
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int ret;
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mutex_init(&wm831x->auxadc_lock);
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INIT_LIST_HEAD(&wm831x->auxadc_pending);
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if (wm831x->irq) {
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wm831x->auxadc_read = wm831x_auxadc_read_irq;
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ret = request_threaded_irq(wm831x_irq(wm831x,
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WM831X_IRQ_AUXADC_DATA),
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NULL, wm831x_auxadc_irq, 0,
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"auxadc", wm831x);
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if (ret < 0) {
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dev_err(wm831x->dev, "AUXADC IRQ request failed: %d\n",
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ret);
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wm831x->auxadc_read = NULL;
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}
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}
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if (!wm831x->auxadc_read)
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wm831x->auxadc_read = wm831x_auxadc_read_polled;
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}
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