Suzuki K Poulose 7520fa9924 perf: ARM DynamIQ Shared Unit PMU support ... Add support for the Cluster PMU part of the ARM DynamIQ Shared Unit (DSU). The DSU integrates one or more cores with an L3 memory system, control logic, and external interfaces to form a multicore cluster. The PMU allows counting the various events related to L3, SCU etc, along with providing a cycle counter. The PMU can be accessed via system registers, which are common to the cores in the same cluster. The PMU registers follow the semantics of the ARMv8 PMU, mostly, with the exception that the counters record the cluster wide events. This driver is mostly based on the ARMv8 and CCI PMU drivers. The driver only supports ARM64 at the moment. It can be extended to support ARM32 by providing register accessors like we do in arch/arm64/include/arm_dsu_pmu.h. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>		2018-01-02 16:43:12 +00:00
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arm_dsu_pmu.txt	perf: ARM DynamIQ Shared Unit PMU support	2018-01-02 16:43:12 +00:00
hisi-pmu.txt	Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver	2017-10-19 17:06:34 +01:00
qcom_l2_pmu.txt	perf: add qcom l2 cache perf events driver	2017-02-08 19:32:24 +00:00
qcom_l3_pmu.txt	perf: qcom: Add L3 cache PMU driver	2017-04-03 18:53:50 +01:00
xgene-pmu.txt