Vincent Chen 2f01b78641 riscv: remove the switch statement in do_trap_break() ... To make the code more straightforward, replace the switch statement with an if statement. Suggested-by: Paul Walmsley <paul.walmsley@sifive.com> Signed-off-by: Vincent Chen <vincent.chen@sifive.com> [paul.walmsley@sifive.com: cleaned up patch description; updated to apply] Link: https://lore.kernel.org/linux-riscv/20190927224711.GI4700@infradead.org/ Link: https://lore.kernel.org/linux-riscv/CABvJ_xiHJSB7P5QekuLRP=LBPzXXghAfuUpPUYb=a_HbnOQ6BA@mail.gmail.com/ Link: https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org/thread/VDCU2WOB6KQISREO4V5DTXEI2M7VOV55/ Cc: Christoph Hellwig <hch@lst.de> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>		2019-10-14 12:30:28 -07:00
..
vdso
.gitignore
asm-offsets.c
cacheinfo.c
cpu.c
cpufeature.c
entry.S	RISC-V: entry: Remove unneeded need_resched() loop	2019-10-09 16:48:27 -07:00
fpu.S	riscv: Using CSR numbers to access CSRs	2019-08-30 11:04:19 -07:00
ftrace.c
head.S	arch/riscv: disable excess harts before picking main boot hart	2019-09-20 08:36:36 -07:00
irq.c
Makefile	riscv: Add support for perf registers sampling	2019-09-05 00:48:58 -07:00
mcount-dyn.S
mcount.S
module-sections.c
module.c
module.lds
perf_callchain.c	riscv: Add perf callchain support	2019-09-04 12:43:00 -07:00
perf_event.c
perf_regs.c	riscv: Add support for perf registers sampling	2019-09-05 00:48:58 -07:00
process.c	riscv: Correct the initialized flow of FP register	2019-08-14 13:11:11 -07:00
ptrace.c
reset.c
riscv_ksyms.c
setup.c
signal.c
smp.c	RISC-V: Export kernel symbols for kvm	2019-09-20 08:36:39 -07:00
smpboot.c
stacktrace.c	riscv: Add perf callchain support	2019-09-04 12:43:00 -07:00
sys_riscv.c
syscall_table.c
time.c	RISC-V: Export kernel symbols for kvm	2019-09-20 08:36:39 -07:00
traps.c	riscv: remove the switch statement in do_trap_break()	2019-10-14 12:30:28 -07:00
vdso.c
vmlinux.lds.S