Dinh Nguyen f450f28e70 reset: socfpga: fix for 64-bit compilation ... The SoCFPGA Stratix10 reset controller has 32-bit registers. Thus, we cannot use BITS_PER_LONG in computing the register and bit offset. Instead, we should be using the width of the hardware register for the calculation. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>		2017-10-04 10:29:44 +02:00
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hisilicon
sti
tegra
core.c
Kconfig
Makefile
reset-a10sr.c
reset-ath79.c
reset-berlin.c
reset-hsdk.c
reset-imx7.c
reset-lantiq.c
reset-lpc18xx.c
reset-meson.c
reset-oxnas.c
reset-pistachio.c
reset-socfpga.c
reset-stm32.c
reset-sunxi.c
reset-ti-sci.c
reset-ti-syscon.c
reset-uniphier.c
reset-zx2967.c
reset-zynq.c