mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 13:38:24 +07:00
9fabd4eede
Daniel writes: Highlights of this -next round: - ivb fdi B/C fixes - hsw sprite/plane offset fixes from Damien - unified dp/hdmi encoder for hsw, finally external dp support on hsw (Paulo) - kill-agp and some other prep work in the gtt code from Ben - some fb handling fixes from Ville - massive pile of patches to align hsw VGA with the spec and make it actually work (Paulo) - pile of workarounds from Jesse, mostly for vlv, but also some other related platforms - start of a dev_priv reorg, that thing grew out of bounds and chaotic - small bits&pieces all over the place, down to better error handling for load-detect on gen2 (Chris, Jani, Mika, Zhenyu, ...) On top of the previous pile (just copypasta): - tons of hsw dp prep patches form Paulo - round scheduled work items and timers to nearest second (Chris) - some hw workarounds (Jesse&Damien) - vlv dp support and related fixups (Vijay et al.) - basic haswell dp support, not yet wired up for external ports (Paulo) - edp support (Paulo) - tons of refactorings to prepare for the above (Paulo) - panel rework, unifiying code between lvds and edp panels (Jani) - panel fitter scaling modes (Jani + Yuly Novikov) - panel power improvements, should now work without the BIOS setting it up - extracting some dp helpers from radeon/i915 and move them to drm_dp_helper.c - randome pile of workarounds (Damien, Ben, ...) - some cleanups for the register restore code for suspend/resume - secure batchbuffer support, should enable tear-free blits on gen6+ Chris) - random smaller fixlets and cleanups. * 'for-airlied' of git://people.freedesktop.org/~danvet/drm-intel: (231 commits) drm/i915: Restore physical HWS_PGA after resume drm/i915: Report amount of usable graphics memory in MiB drm/i915/i2c: Track users of GMBUS force-bit drm/i915: Allocate the proper size for contexts. drm/i915: Update load-detect failure paths for modeset-rework drm/i915: Clear unused fields of mode for framebuffer creation drm/i915: Always calculate 8xx WM values based on a 32-bpp framebuffer drm/i915: Fix sparse warnings in from AGP kill code drm/i915: Missed lock change with rps lock drm/i915: Move the remaining gtt code drm/i915: flush system agent TLBs on SNB drm/i915: Kill off now unused gen6+ AGP code drm/i915: Calculate correct stolen size for GEN7+ drm/i915: Stop using AGP layer for GEN6+ drm/i915: drop the double-OP_STOREDW usage in blt_ring_flush drm/i915: don't rewrite the GTT on resume v4 drm/i915: protect RPS/RC6 related accesses (including PCU) with a new mutex drm/i915: put ring frequency and turbo setup into a work queue v5 drm/i915: don't block resume on fb console resume v2 drm/i915: extract l3_parity substruct from dev_priv ...
484 lines
13 KiB
C
484 lines
13 KiB
C
/*
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* Copyright © 2006-2010 Intel Corporation
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* Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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* Dave Airlie <airlied@linux.ie>
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* Jesse Barnes <jesse.barnes@intel.com>
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* Chris Wilson <chris@chris-wilson.co.uk>
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/moduleparam.h>
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#include "intel_drv.h"
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#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
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void
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intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
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struct drm_display_mode *adjusted_mode)
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{
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adjusted_mode->hdisplay = fixed_mode->hdisplay;
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adjusted_mode->hsync_start = fixed_mode->hsync_start;
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adjusted_mode->hsync_end = fixed_mode->hsync_end;
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adjusted_mode->htotal = fixed_mode->htotal;
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adjusted_mode->vdisplay = fixed_mode->vdisplay;
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adjusted_mode->vsync_start = fixed_mode->vsync_start;
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adjusted_mode->vsync_end = fixed_mode->vsync_end;
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adjusted_mode->vtotal = fixed_mode->vtotal;
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adjusted_mode->clock = fixed_mode->clock;
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}
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/* adjusted_mode has been preset to be the panel's fixed mode */
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void
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intel_pch_panel_fitting(struct drm_device *dev,
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int fitting_mode,
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const struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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int x, y, width, height;
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x = y = width = height = 0;
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/* Native modes don't need fitting */
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if (adjusted_mode->hdisplay == mode->hdisplay &&
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adjusted_mode->vdisplay == mode->vdisplay)
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goto done;
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switch (fitting_mode) {
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case DRM_MODE_SCALE_CENTER:
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width = mode->hdisplay;
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height = mode->vdisplay;
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x = (adjusted_mode->hdisplay - width + 1)/2;
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y = (adjusted_mode->vdisplay - height + 1)/2;
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break;
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case DRM_MODE_SCALE_ASPECT:
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/* Scale but preserve the aspect ratio */
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{
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u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
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u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
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if (scaled_width > scaled_height) { /* pillar */
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width = scaled_height / mode->vdisplay;
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if (width & 1)
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width++;
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x = (adjusted_mode->hdisplay - width + 1) / 2;
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y = 0;
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height = adjusted_mode->vdisplay;
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} else if (scaled_width < scaled_height) { /* letter */
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height = scaled_width / mode->hdisplay;
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if (height & 1)
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height++;
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y = (adjusted_mode->vdisplay - height + 1) / 2;
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x = 0;
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width = adjusted_mode->hdisplay;
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} else {
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x = y = 0;
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width = adjusted_mode->hdisplay;
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height = adjusted_mode->vdisplay;
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}
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}
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break;
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default:
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case DRM_MODE_SCALE_FULLSCREEN:
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x = y = 0;
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width = adjusted_mode->hdisplay;
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height = adjusted_mode->vdisplay;
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break;
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}
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done:
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dev_priv->pch_pf_pos = (x << 16) | y;
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dev_priv->pch_pf_size = (width << 16) | height;
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}
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static int is_backlight_combination_mode(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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if (INTEL_INFO(dev)->gen >= 4)
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return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
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if (IS_GEN2(dev))
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return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
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return 0;
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}
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static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv)
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{
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u32 val;
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/* Restore the CTL value if it lost, e.g. GPU reset */
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if (HAS_PCH_SPLIT(dev_priv->dev)) {
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val = I915_READ(BLC_PWM_PCH_CTL2);
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if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) {
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dev_priv->regfile.saveBLC_PWM_CTL2 = val;
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} else if (val == 0) {
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I915_WRITE(BLC_PWM_PCH_CTL2,
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dev_priv->regfile.saveBLC_PWM_CTL2);
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val = dev_priv->regfile.saveBLC_PWM_CTL2;
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}
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} else {
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val = I915_READ(BLC_PWM_CTL);
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if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
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dev_priv->regfile.saveBLC_PWM_CTL = val;
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dev_priv->regfile.saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2);
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} else if (val == 0) {
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I915_WRITE(BLC_PWM_CTL,
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dev_priv->regfile.saveBLC_PWM_CTL);
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I915_WRITE(BLC_PWM_CTL2,
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dev_priv->regfile.saveBLC_PWM_CTL2);
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val = dev_priv->regfile.saveBLC_PWM_CTL;
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}
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}
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return val;
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}
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static u32 _intel_panel_get_max_backlight(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 max;
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max = i915_read_blc_pwm_ctl(dev_priv);
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if (HAS_PCH_SPLIT(dev)) {
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max >>= 16;
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} else {
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if (INTEL_INFO(dev)->gen < 4)
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max >>= 17;
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else
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max >>= 16;
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if (is_backlight_combination_mode(dev))
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max *= 0xff;
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}
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return max;
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}
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u32 intel_panel_get_max_backlight(struct drm_device *dev)
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{
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u32 max;
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max = _intel_panel_get_max_backlight(dev);
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if (max == 0) {
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/* XXX add code here to query mode clock or hardware clock
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* and program max PWM appropriately.
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*/
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pr_warn_once("fixme: max PWM is zero\n");
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return 1;
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}
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DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
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return max;
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}
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static int i915_panel_invert_brightness;
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MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
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"(-1 force normal, 0 machine defaults, 1 force inversion), please "
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"report PCI device ID, subsystem vendor and subsystem device ID "
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"to dri-devel@lists.freedesktop.org, if your machine needs it. "
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"It will then be included in an upcoming module version.");
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module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
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static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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if (i915_panel_invert_brightness < 0)
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return val;
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if (i915_panel_invert_brightness > 0 ||
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dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS)
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return intel_panel_get_max_backlight(dev) - val;
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return val;
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}
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static u32 intel_panel_get_backlight(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 val;
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if (HAS_PCH_SPLIT(dev)) {
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val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
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} else {
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val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
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if (INTEL_INFO(dev)->gen < 4)
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val >>= 1;
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if (is_backlight_combination_mode(dev)) {
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u8 lbpc;
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pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
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val *= lbpc;
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}
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}
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val = intel_panel_compute_brightness(dev, val);
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DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
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return val;
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}
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static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
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I915_WRITE(BLC_PWM_CPU_CTL, val | level);
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}
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static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 tmp;
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DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
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level = intel_panel_compute_brightness(dev, level);
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if (HAS_PCH_SPLIT(dev))
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return intel_pch_panel_set_backlight(dev, level);
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if (is_backlight_combination_mode(dev)) {
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u32 max = intel_panel_get_max_backlight(dev);
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u8 lbpc;
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lbpc = level * 0xfe / max + 1;
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level /= lbpc;
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pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
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}
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tmp = I915_READ(BLC_PWM_CTL);
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if (INTEL_INFO(dev)->gen < 4)
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level <<= 1;
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tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
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I915_WRITE(BLC_PWM_CTL, tmp | level);
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}
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void intel_panel_set_backlight(struct drm_device *dev, u32 level)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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dev_priv->backlight_level = level;
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if (dev_priv->backlight_enabled)
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intel_panel_actually_set_backlight(dev, level);
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}
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void intel_panel_disable_backlight(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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dev_priv->backlight_enabled = false;
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intel_panel_actually_set_backlight(dev, 0);
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if (INTEL_INFO(dev)->gen >= 4) {
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uint32_t reg, tmp;
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reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
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I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
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if (HAS_PCH_SPLIT(dev)) {
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tmp = I915_READ(BLC_PWM_PCH_CTL1);
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tmp &= ~BLM_PCH_PWM_ENABLE;
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I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
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}
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}
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}
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void intel_panel_enable_backlight(struct drm_device *dev,
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enum pipe pipe)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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if (dev_priv->backlight_level == 0)
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dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
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if (INTEL_INFO(dev)->gen >= 4) {
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uint32_t reg, tmp;
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reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
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tmp = I915_READ(reg);
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/* Note that this can also get called through dpms changes. And
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* we don't track the backlight dpms state, hence check whether
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* we have to do anything first. */
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if (tmp & BLM_PWM_ENABLE)
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goto set_level;
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if (dev_priv->num_pipe == 3)
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tmp &= ~BLM_PIPE_SELECT_IVB;
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else
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tmp &= ~BLM_PIPE_SELECT;
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tmp |= BLM_PIPE(pipe);
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tmp &= ~BLM_PWM_ENABLE;
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I915_WRITE(reg, tmp);
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POSTING_READ(reg);
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I915_WRITE(reg, tmp | BLM_PWM_ENABLE);
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if (HAS_PCH_SPLIT(dev)) {
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tmp = I915_READ(BLC_PWM_PCH_CTL1);
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tmp |= BLM_PCH_PWM_ENABLE;
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tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
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I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
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}
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}
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set_level:
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/* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
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* BLC_PWM_CPU_CTL may be cleared to zero automatically when these
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* registers are set.
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*/
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dev_priv->backlight_enabled = true;
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intel_panel_actually_set_backlight(dev, dev_priv->backlight_level);
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}
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static void intel_panel_init_backlight(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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dev_priv->backlight_level = intel_panel_get_backlight(dev);
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dev_priv->backlight_enabled = dev_priv->backlight_level != 0;
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}
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enum drm_connector_status
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intel_panel_detect(struct drm_device *dev)
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{
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#if 0
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struct drm_i915_private *dev_priv = dev->dev_private;
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#endif
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if (i915_panel_ignore_lid)
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return i915_panel_ignore_lid > 0 ?
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connector_status_connected :
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connector_status_disconnected;
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/* opregion lid state on HP 2540p is wrong at boot up,
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* appears to be either the BIOS or Linux ACPI fault */
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#if 0
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/* Assume that the BIOS does not lie through the OpRegion... */
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if (dev_priv->opregion.lid_state)
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return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
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connector_status_connected :
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connector_status_disconnected;
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#endif
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return connector_status_unknown;
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}
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#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
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static int intel_panel_update_status(struct backlight_device *bd)
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{
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struct drm_device *dev = bl_get_data(bd);
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intel_panel_set_backlight(dev, bd->props.brightness);
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return 0;
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}
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static int intel_panel_get_brightness(struct backlight_device *bd)
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{
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struct drm_device *dev = bl_get_data(bd);
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struct drm_i915_private *dev_priv = dev->dev_private;
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return dev_priv->backlight_level;
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}
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static const struct backlight_ops intel_panel_bl_ops = {
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.update_status = intel_panel_update_status,
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.get_brightness = intel_panel_get_brightness,
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};
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int intel_panel_setup_backlight(struct drm_connector *connector)
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{
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struct drm_device *dev = connector->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct backlight_properties props;
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intel_panel_init_backlight(dev);
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memset(&props, 0, sizeof(props));
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props.type = BACKLIGHT_RAW;
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props.max_brightness = _intel_panel_get_max_backlight(dev);
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if (props.max_brightness == 0) {
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DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
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return -ENODEV;
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}
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dev_priv->backlight =
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backlight_device_register("intel_backlight",
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&connector->kdev, dev,
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&intel_panel_bl_ops, &props);
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if (IS_ERR(dev_priv->backlight)) {
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DRM_ERROR("Failed to register backlight: %ld\n",
|
|
PTR_ERR(dev_priv->backlight));
|
|
dev_priv->backlight = NULL;
|
|
return -ENODEV;
|
|
}
|
|
dev_priv->backlight->props.brightness = intel_panel_get_backlight(dev);
|
|
return 0;
|
|
}
|
|
|
|
void intel_panel_destroy_backlight(struct drm_device *dev)
|
|
{
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
if (dev_priv->backlight)
|
|
backlight_device_unregister(dev_priv->backlight);
|
|
}
|
|
#else
|
|
int intel_panel_setup_backlight(struct drm_connector *connector)
|
|
{
|
|
intel_panel_init_backlight(connector->dev);
|
|
return 0;
|
|
}
|
|
|
|
void intel_panel_destroy_backlight(struct drm_device *dev)
|
|
{
|
|
return;
|
|
}
|
|
#endif
|
|
|
|
int intel_panel_init(struct intel_panel *panel,
|
|
struct drm_display_mode *fixed_mode)
|
|
{
|
|
panel->fixed_mode = fixed_mode;
|
|
|
|
return 0;
|
|
}
|
|
|
|
void intel_panel_fini(struct intel_panel *panel)
|
|
{
|
|
struct intel_connector *intel_connector =
|
|
container_of(panel, struct intel_connector, panel);
|
|
|
|
if (panel->fixed_mode)
|
|
drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
|
|
}
|