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8e25e1eef8
[ Upstream commit 7078a5ba7a58e5db07583b176f8a03e0b8714731 ] We have rst_map_012 used for various accelerators like dsp, ipu and iva. For these use cases, we have rstctrl bit 2 control the subsystem module reset, and have and bits 0 and 1 control the accelerator specific features. If the bootloader, or kexec boot, has left any accelerator specific reset bits deasserted, deasserting bit 2 reset will potentially enable an accelerator with unconfigured MMU and no firmware. And we may get spammed with a lot by warnings on boot with "Data Access in User mode during Functional access", or depending on the accelerator, the system can also just hang. This issue can be quite easily reproduced by setting a rst_map_012 type rstctrl register to 0 or 4 in the bootloader, and booting the system. Let's just assert all reset bits for rst_map_012 type resets. So far it looks like the other rstctrl types don't need this. If it turns out that the other type rstctrl bits also need reset on init, we need to add an instance specific reset mask for the bits to avoid resetting unwanted bits. Reported-by: Carl Philipp Klemm <philipp@uvos.xyz> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Santosh Shilimkar <ssantosh@kernel.org> Cc: Suman Anna <s-anna@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Tested-by: Carl Philipp Klemm <philipp@uvos.xyz> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Sasha Levin <sashal@kernel.org> |
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| actions | ||
| amlogic | ||
| aspeed | ||
| atmel | ||
| bcm | ||
| dove | ||
| fsl | ||
| gemini | ||
| imx | ||
| ixp4xx | ||
| kendryte | ||
| lantiq | ||
| mediatek | ||
| qcom | ||
| renesas | ||
| rockchip | ||
| samsung | ||
| sifive | ||
| sunxi | ||
| tegra | ||
| ti | ||
| ux500 | ||
| versatile | ||
| xilinx | ||
| zte | ||
| Kconfig | ||
| Makefile | ||