mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-25 22:05:23 +07:00
9f67437b3a
Platforms using DesignWare IP use dw_pci_msi_bottom_irq_chip for configuring the MSI controller logic within the DesignWare IP. However certain platforms like Keystone (K2G) which uses DesignWare IP have their own MSI controller logic. For handling such platforms, the irqchip ops use msi_irq_ack(), msi_set_irq(), msi_clear_irq() callback functions. Add support to use different msi_irq_chip with default set to dw_pci_msi_bottom_irq_chip. This is in preparation to get rid of msi_irq_ack(), msi_set_irq(), msi_clear_irq() and other Keystone specific dw_pcie_host_ops. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> |
||
---|---|---|
.. | ||
Kconfig | ||
Makefile | ||
pci-dra7xx.c | ||
pci-exynos.c | ||
pci-imx6.c | ||
pci-keystone.c | ||
pci-layerscape-ep.c | ||
pci-layerscape.c | ||
pci-meson.c | ||
pcie-armada8k.c | ||
pcie-artpec6.c | ||
pcie-designware-ep.c | ||
pcie-designware-host.c | ||
pcie-designware-plat.c | ||
pcie-designware.c | ||
pcie-designware.h | ||
pcie-hisi.c | ||
pcie-histb.c | ||
pcie-kirin.c | ||
pcie-qcom.c | ||
pcie-spear13xx.c | ||
pcie-uniphier.c |