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9ef9c640f4
This is done in two steps: 1) Issuing CREATE_VPORT_LAG in order to have Ethernet traffic from both ports arriving on PF0 root flowtable, so we will be able to catch all raw-eth traffic on PF0. 2) Creation of LAG demux flowtable in order to direct all non-raw-eth traffic back to its source port, assuring that normal Ethernet traffic "jumps" to the root flowtable of its RX port (non-LAG behavior). Signed-off-by: Aviv Heller <avivh@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org> Signed-off-by: Doug Ledford <dledford@redhat.com> |
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| cxgb3 | ||
| cxgb4 | ||
| hfi1 | ||
| hns | ||
| i40iw | ||
| mlx4 | ||
| mlx5 | ||
| mthca | ||
| nes | ||
| ocrdma | ||
| qib | ||
| usnic | ||
| Makefile | ||