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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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e4e3a37d33
Add SOC BUS support with CPU family, machine name and unique ID. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
150 lines
3.8 KiB
C
150 lines
3.8 KiB
C
/*
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* CLPS711X common devices definitions
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*
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* Author: Alexander Shiyan <shc_work@mail.ru>, 2013-2014
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/io.h>
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#include <linux/of_fdt.h>
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#include <linux/platform_device.h>
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#include <linux/random.h>
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#include <linux/sizes.h>
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#include <linux/slab.h>
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#include <linux/sys_soc.h>
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#include <asm/system_info.h>
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#include <mach/hardware.h>
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static const struct resource clps711x_cpuidle_res __initconst =
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DEFINE_RES_MEM(CLPS711X_PHYS_BASE + HALT, SZ_128);
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static void __init clps711x_add_cpuidle(void)
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{
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platform_device_register_simple("clps711x-cpuidle", PLATFORM_DEVID_NONE,
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&clps711x_cpuidle_res, 1);
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}
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static const phys_addr_t clps711x_gpios[][2] __initconst = {
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{ PADR, PADDR },
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{ PBDR, PBDDR },
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{ PCDR, PCDDR },
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{ PDDR, PDDDR },
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{ PEDR, PEDDR },
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};
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static void __init clps711x_add_gpio(void)
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{
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unsigned i;
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struct resource gpio_res[2];
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memset(gpio_res, 0, sizeof(gpio_res));
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gpio_res[0].flags = IORESOURCE_MEM;
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gpio_res[1].flags = IORESOURCE_MEM;
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for (i = 0; i < ARRAY_SIZE(clps711x_gpios); i++) {
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gpio_res[0].start = CLPS711X_PHYS_BASE + clps711x_gpios[i][0];
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gpio_res[0].end = gpio_res[0].start;
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gpio_res[1].start = CLPS711X_PHYS_BASE + clps711x_gpios[i][1];
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gpio_res[1].end = gpio_res[1].start;
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platform_device_register_simple("clps711x-gpio", i,
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gpio_res, ARRAY_SIZE(gpio_res));
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}
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}
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const struct resource clps711x_syscon_res[] __initconst = {
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/* SYSCON1, SYSFLG1 */
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DEFINE_RES_MEM(CLPS711X_PHYS_BASE + SYSCON1, SZ_128),
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/* SYSCON2, SYSFLG2 */
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DEFINE_RES_MEM(CLPS711X_PHYS_BASE + SYSCON2, SZ_128),
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/* SYSCON3 */
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DEFINE_RES_MEM(CLPS711X_PHYS_BASE + SYSCON3, SZ_64),
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};
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static void __init clps711x_add_syscon(void)
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{
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unsigned i;
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for (i = 0; i < ARRAY_SIZE(clps711x_syscon_res); i++)
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platform_device_register_simple("syscon", i + 1,
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&clps711x_syscon_res[i], 1);
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}
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static const struct resource clps711x_uart1_res[] __initconst = {
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DEFINE_RES_MEM(CLPS711X_PHYS_BASE + UARTDR1, SZ_128),
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DEFINE_RES_IRQ(IRQ_UTXINT1),
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DEFINE_RES_IRQ(IRQ_URXINT1),
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};
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static const struct resource clps711x_uart2_res[] __initconst = {
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DEFINE_RES_MEM(CLPS711X_PHYS_BASE + UARTDR2, SZ_128),
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DEFINE_RES_IRQ(IRQ_UTXINT2),
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DEFINE_RES_IRQ(IRQ_URXINT2),
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};
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static void __init clps711x_add_uart(void)
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{
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platform_device_register_simple("clps711x-uart", 0, clps711x_uart1_res,
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ARRAY_SIZE(clps711x_uart1_res));
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platform_device_register_simple("clps711x-uart", 1, clps711x_uart2_res,
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ARRAY_SIZE(clps711x_uart2_res));
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};
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static void __init clps711x_soc_init(void)
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{
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struct soc_device_attribute *soc_dev_attr;
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struct soc_device *soc_dev;
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void __iomem *base;
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u32 id[5];
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base = ioremap(CLPS711X_PHYS_BASE, SZ_32K);
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if (!base)
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return;
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id[0] = readl(base + UNIQID);
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id[1] = readl(base + RANDID0);
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id[2] = readl(base + RANDID1);
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id[3] = readl(base + RANDID2);
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id[4] = readl(base + RANDID3);
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system_rev = SYSFLG1_VERID(readl(base + SYSFLG1));
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add_device_randomness(id, sizeof(id));
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system_serial_low = id[0];
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soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
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if (!soc_dev_attr)
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goto out_unmap;
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soc_dev_attr->machine = of_flat_dt_get_machine_name();
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soc_dev_attr->family = "Cirrus Logic CLPS711X";
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soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%u", system_rev);
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soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%08x", id[0]);
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soc_dev = soc_device_register(soc_dev_attr);
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if (IS_ERR(soc_dev)) {
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kfree(soc_dev_attr->revision);
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kfree(soc_dev_attr->soc_id);
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kfree(soc_dev_attr);
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}
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out_unmap:
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iounmap(base);
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}
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void __init clps711x_devices_init(void)
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{
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clps711x_add_cpuidle();
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clps711x_add_gpio();
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clps711x_add_syscon();
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clps711x_add_uart();
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clps711x_soc_init();
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}
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