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With pinctrl-single,bits it is possible to update just part of the register within the pinctrl-single,function-mask area. This is useful when one register configures mmore than one pin's mux. pinctrl-single,bits takes three parameters: <reg offset, value, sub-mask> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> [Removed a misplaced comment] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
129 lines
3.4 KiB
Plaintext
129 lines
3.4 KiB
Plaintext
One-register-per-pin type device tree based pinctrl driver
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Required properties:
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- compatible : "pinctrl-single"
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- reg : offset and length of the register set for the mux registers
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- pinctrl-single,register-width : pinmux register access width in bits
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- pinctrl-single,function-mask : mask of allowed pinmux function bits
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in the pinmux register
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Optional properties:
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- pinctrl-single,function-off : function off mode for disabled state if
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available and same for all registers; if not specified, disabling of
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pin functions is ignored
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- pinctrl-single,bit-per-mux : boolean to indicate that one register controls
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more than one pin
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This driver assumes that there is only one register for each pin (unless the
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pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as
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specified in the pinctrl-bindings.txt document in this directory.
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The pin configuration nodes for pinctrl-single are specified as pinctrl
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register offset and value pairs using pinctrl-single,pins. Only the bits
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specified in pinctrl-single,function-mask are updated. For example, setting
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a pin for a device could be done with:
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pinctrl-single,pins = <0xdc 0x118>;
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Where 0xdc is the offset from the pinctrl register base address for the
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device pinctrl register, and 0x118 contains the desired value of the
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pinctrl register. See the device example and static board pins example
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below for more information.
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In case when one register changes more than one pin's mux the
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pinctrl-single,bits need to be used which takes three parameters:
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pinctrl-single,bits = <0xdc 0x18, 0xff>;
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Where 0xdc is the offset from the pinctrl register base address for the
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device pinctrl register, 0x18 is the desired value, and 0xff is the sub mask to
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be used when applying this change to the register.
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Example:
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/* SoC common file */
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/* first controller instance for pins in core domain */
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pmx_core: pinmux@4a100040 {
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compatible = "pinctrl-single";
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reg = <0x4a100040 0x0196>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-single,register-width = <16>;
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pinctrl-single,function-mask = <0xffff>;
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};
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/* second controller instance for pins in wkup domain */
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pmx_wkup: pinmux@4a31e040 {
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compatible = "pinctrl-single;
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reg = <0x4a31e040 0x0038>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-single,register-width = <16>;
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pinctrl-single,function-mask = <0xffff>;
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};
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control_devconf0: pinmux@48002274 {
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compatible = "pinctrl-single";
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reg = <0x48002274 4>; /* Single register */
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-single,bit-per-mux;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0x5F>;
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};
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/* board specific .dts file */
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&pmx_core {
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/*
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* map all board specific static pins enabled by the pinctrl driver
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* itself during the boot (or just set them up in the bootloader)
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*/
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pinctrl-names = "default";
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pinctrl-0 = <&board_pins>;
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board_pins: pinmux_board_pins {
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pinctrl-single,pins = <
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0x6c 0xf
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0x6e 0xf
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0x70 0xf
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0x72 0xf
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>;
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};
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/* map uart2 pins */
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uart2_pins: pinmux_uart2_pins {
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pinctrl-single,pins = <
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0xd8 0x118
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0xda 0
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0xdc 0x118
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0xde 0
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>;
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};
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};
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&control_devconf0 {
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mcbsp1_pins: pinmux_mcbsp1_pins {
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pinctrl-single,bits = <
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0x00 0x18 0x18 /* FSR/CLKR signal from FSX/CLKX pin */
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>;
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};
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mcbsp2_clks_pins: pinmux_mcbsp2_clks_pins {
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pinctrl-single,bits = <
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0x00 0x40 0x40 /* McBSP2 CLKS from McBSP_CLKS pin */
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>;
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};
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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};
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