mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-14 22:26:45 +07:00
c9acece064
This is a no-op that simply moves all locking and unlocking of ->reg_lock into trivial helpers. I did that to be able to easily add some ad hoc instrumentation to those helpers to get some information on contention and hold times of the mutex. Perhaps others want to do something similar at some point, so this frees them from doing the 'sed -i' yoga, and have a much smaller 'git diff' while fiddling. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
738 lines
18 KiB
C
738 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Marvell 88E6xxx SERDES manipulation, via SMI bus
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*
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* Copyright (c) 2008 Marvell Semiconductor
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*
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* Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>
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*/
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#include <linux/interrupt.h>
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#include <linux/irqdomain.h>
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#include <linux/mii.h>
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#include "chip.h"
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#include "global2.h"
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#include "phy.h"
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#include "port.h"
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#include "serdes.h"
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static int mv88e6352_serdes_read(struct mv88e6xxx_chip *chip, int reg,
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u16 *val)
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{
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return mv88e6xxx_phy_page_read(chip, MV88E6352_ADDR_SERDES,
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MV88E6352_SERDES_PAGE_FIBER,
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reg, val);
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}
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static int mv88e6352_serdes_write(struct mv88e6xxx_chip *chip, int reg,
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u16 val)
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{
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return mv88e6xxx_phy_page_write(chip, MV88E6352_ADDR_SERDES,
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MV88E6352_SERDES_PAGE_FIBER,
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reg, val);
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}
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static int mv88e6390_serdes_read(struct mv88e6xxx_chip *chip,
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int lane, int device, int reg, u16 *val)
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{
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int reg_c45 = MII_ADDR_C45 | device << 16 | reg;
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return mv88e6xxx_phy_read(chip, lane, reg_c45, val);
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}
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static int mv88e6390_serdes_write(struct mv88e6xxx_chip *chip,
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int lane, int device, int reg, u16 val)
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{
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int reg_c45 = MII_ADDR_C45 | device << 16 | reg;
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return mv88e6xxx_phy_write(chip, lane, reg_c45, val);
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}
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static int mv88e6352_serdes_power_set(struct mv88e6xxx_chip *chip, bool on)
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{
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u16 val, new_val;
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int err;
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err = mv88e6352_serdes_read(chip, MII_BMCR, &val);
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if (err)
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return err;
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if (on)
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new_val = val & ~BMCR_PDOWN;
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else
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new_val = val | BMCR_PDOWN;
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if (val != new_val)
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err = mv88e6352_serdes_write(chip, MII_BMCR, new_val);
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return err;
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}
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static bool mv88e6352_port_has_serdes(struct mv88e6xxx_chip *chip, int port)
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{
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u8 cmode = chip->ports[port].cmode;
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if ((cmode == MV88E6XXX_PORT_STS_CMODE_100BASE_X) ||
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(cmode == MV88E6XXX_PORT_STS_CMODE_1000BASE_X) ||
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(cmode == MV88E6XXX_PORT_STS_CMODE_SGMII))
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return true;
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return false;
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}
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int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on)
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{
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int err;
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if (mv88e6352_port_has_serdes(chip, port)) {
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err = mv88e6352_serdes_power_set(chip, on);
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if (err < 0)
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return err;
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}
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return 0;
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}
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struct mv88e6352_serdes_hw_stat {
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char string[ETH_GSTRING_LEN];
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int sizeof_stat;
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int reg;
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};
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static struct mv88e6352_serdes_hw_stat mv88e6352_serdes_hw_stats[] = {
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{ "serdes_fibre_rx_error", 16, 21 },
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{ "serdes_PRBS_error", 32, 24 },
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};
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int mv88e6352_serdes_get_sset_count(struct mv88e6xxx_chip *chip, int port)
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{
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if (mv88e6352_port_has_serdes(chip, port))
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return ARRAY_SIZE(mv88e6352_serdes_hw_stats);
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return 0;
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}
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int mv88e6352_serdes_get_strings(struct mv88e6xxx_chip *chip,
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int port, uint8_t *data)
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{
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struct mv88e6352_serdes_hw_stat *stat;
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int i;
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if (!mv88e6352_port_has_serdes(chip, port))
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return 0;
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for (i = 0; i < ARRAY_SIZE(mv88e6352_serdes_hw_stats); i++) {
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stat = &mv88e6352_serdes_hw_stats[i];
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memcpy(data + i * ETH_GSTRING_LEN, stat->string,
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ETH_GSTRING_LEN);
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}
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return ARRAY_SIZE(mv88e6352_serdes_hw_stats);
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}
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static uint64_t mv88e6352_serdes_get_stat(struct mv88e6xxx_chip *chip,
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struct mv88e6352_serdes_hw_stat *stat)
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{
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u64 val = 0;
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u16 reg;
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int err;
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err = mv88e6352_serdes_read(chip, stat->reg, ®);
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if (err) {
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dev_err(chip->dev, "failed to read statistic\n");
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return 0;
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}
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val = reg;
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if (stat->sizeof_stat == 32) {
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err = mv88e6352_serdes_read(chip, stat->reg + 1, ®);
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if (err) {
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dev_err(chip->dev, "failed to read statistic\n");
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return 0;
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}
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val = val << 16 | reg;
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}
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return val;
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}
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int mv88e6352_serdes_get_stats(struct mv88e6xxx_chip *chip, int port,
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uint64_t *data)
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{
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struct mv88e6xxx_port *mv88e6xxx_port = &chip->ports[port];
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struct mv88e6352_serdes_hw_stat *stat;
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u64 value;
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int i;
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if (!mv88e6352_port_has_serdes(chip, port))
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return 0;
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BUILD_BUG_ON(ARRAY_SIZE(mv88e6352_serdes_hw_stats) >
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ARRAY_SIZE(mv88e6xxx_port->serdes_stats));
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for (i = 0; i < ARRAY_SIZE(mv88e6352_serdes_hw_stats); i++) {
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stat = &mv88e6352_serdes_hw_stats[i];
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value = mv88e6352_serdes_get_stat(chip, stat);
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mv88e6xxx_port->serdes_stats[i] += value;
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data[i] = mv88e6xxx_port->serdes_stats[i];
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}
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return ARRAY_SIZE(mv88e6352_serdes_hw_stats);
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}
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static void mv88e6352_serdes_irq_link(struct mv88e6xxx_chip *chip, int port)
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{
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struct dsa_switch *ds = chip->ds;
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u16 status;
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bool up;
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mv88e6352_serdes_read(chip, MII_BMSR, &status);
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/* Status must be read twice in order to give the current link
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* status. Otherwise the change in link status since the last
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* read of the register is returned.
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*/
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mv88e6352_serdes_read(chip, MII_BMSR, &status);
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up = status & BMSR_LSTATUS;
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dsa_port_phylink_mac_change(ds, port, up);
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}
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static irqreturn_t mv88e6352_serdes_thread_fn(int irq, void *dev_id)
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{
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struct mv88e6xxx_port *port = dev_id;
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struct mv88e6xxx_chip *chip = port->chip;
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irqreturn_t ret = IRQ_NONE;
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u16 status;
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int err;
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mv88e6xxx_reg_lock(chip);
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err = mv88e6352_serdes_read(chip, MV88E6352_SERDES_INT_STATUS, &status);
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if (err)
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goto out;
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if (status & MV88E6352_SERDES_INT_LINK_CHANGE) {
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ret = IRQ_HANDLED;
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mv88e6352_serdes_irq_link(chip, port->port);
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}
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out:
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mv88e6xxx_reg_unlock(chip);
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return ret;
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}
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static int mv88e6352_serdes_irq_enable(struct mv88e6xxx_chip *chip)
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{
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return mv88e6352_serdes_write(chip, MV88E6352_SERDES_INT_ENABLE,
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MV88E6352_SERDES_INT_LINK_CHANGE);
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}
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static int mv88e6352_serdes_irq_disable(struct mv88e6xxx_chip *chip)
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{
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return mv88e6352_serdes_write(chip, MV88E6352_SERDES_INT_ENABLE, 0);
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}
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int mv88e6352_serdes_irq_setup(struct mv88e6xxx_chip *chip, int port)
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{
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int err;
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if (!mv88e6352_port_has_serdes(chip, port))
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return 0;
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chip->ports[port].serdes_irq = irq_find_mapping(chip->g2_irq.domain,
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MV88E6352_SERDES_IRQ);
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if (chip->ports[port].serdes_irq < 0) {
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dev_err(chip->dev, "Unable to map SERDES irq: %d\n",
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chip->ports[port].serdes_irq);
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return chip->ports[port].serdes_irq;
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}
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/* Requesting the IRQ will trigger irq callbacks. So we cannot
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* hold the reg_lock.
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*/
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mv88e6xxx_reg_unlock(chip);
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err = request_threaded_irq(chip->ports[port].serdes_irq, NULL,
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mv88e6352_serdes_thread_fn,
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IRQF_ONESHOT, "mv88e6xxx-serdes",
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&chip->ports[port]);
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mv88e6xxx_reg_lock(chip);
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if (err) {
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dev_err(chip->dev, "Unable to request SERDES interrupt: %d\n",
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err);
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return err;
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}
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return mv88e6352_serdes_irq_enable(chip);
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}
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void mv88e6352_serdes_irq_free(struct mv88e6xxx_chip *chip, int port)
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{
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if (!mv88e6352_port_has_serdes(chip, port))
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return;
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mv88e6352_serdes_irq_disable(chip);
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/* Freeing the IRQ will trigger irq callbacks. So we cannot
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* hold the reg_lock.
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*/
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mv88e6xxx_reg_unlock(chip);
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free_irq(chip->ports[port].serdes_irq, &chip->ports[port]);
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mv88e6xxx_reg_lock(chip);
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chip->ports[port].serdes_irq = 0;
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}
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/* Return the SERDES lane address a port is using. Only Ports 9 and 10
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* have SERDES lanes. Returns -ENODEV if a port does not have a lane.
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*/
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static int mv88e6390_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)
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{
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u8 cmode = chip->ports[port].cmode;
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switch (port) {
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case 9:
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if (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
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cmode == MV88E6XXX_PORT_STS_CMODE_SGMII ||
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cmode == MV88E6XXX_PORT_STS_CMODE_2500BASEX)
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return MV88E6390_PORT9_LANE0;
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return -ENODEV;
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case 10:
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if (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
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cmode == MV88E6XXX_PORT_STS_CMODE_SGMII ||
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cmode == MV88E6XXX_PORT_STS_CMODE_2500BASEX)
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return MV88E6390_PORT10_LANE0;
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return -ENODEV;
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default:
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return -ENODEV;
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}
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}
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/* Return the SERDES lane address a port is using. Ports 9 and 10 can
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* use multiple lanes. If so, return the first lane the port uses.
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* Returns -ENODEV if a port does not have a lane.
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*/
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int mv88e6390x_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)
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{
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u8 cmode_port9, cmode_port10, cmode_port;
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cmode_port9 = chip->ports[9].cmode;
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cmode_port10 = chip->ports[10].cmode;
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cmode_port = chip->ports[port].cmode;
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switch (port) {
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case 2:
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if (cmode_port9 == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
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cmode_port9 == MV88E6XXX_PORT_STS_CMODE_SGMII ||
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cmode_port9 == MV88E6XXX_PORT_STS_CMODE_2500BASEX)
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if (cmode_port == MV88E6XXX_PORT_STS_CMODE_1000BASE_X)
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return MV88E6390_PORT9_LANE1;
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return -ENODEV;
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case 3:
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if (cmode_port9 == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
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cmode_port9 == MV88E6XXX_PORT_STS_CMODE_SGMII ||
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cmode_port9 == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||
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cmode_port9 == MV88E6XXX_PORT_STS_CMODE_RXAUI)
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if (cmode_port == MV88E6XXX_PORT_STS_CMODE_1000BASE_X)
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return MV88E6390_PORT9_LANE2;
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return -ENODEV;
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case 4:
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if (cmode_port9 == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
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cmode_port9 == MV88E6XXX_PORT_STS_CMODE_SGMII ||
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cmode_port9 == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||
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cmode_port9 == MV88E6XXX_PORT_STS_CMODE_RXAUI)
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if (cmode_port == MV88E6XXX_PORT_STS_CMODE_1000BASE_X)
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return MV88E6390_PORT9_LANE3;
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return -ENODEV;
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case 5:
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if (cmode_port10 == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
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cmode_port10 == MV88E6XXX_PORT_STS_CMODE_SGMII ||
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cmode_port10 == MV88E6XXX_PORT_STS_CMODE_2500BASEX)
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if (cmode_port == MV88E6XXX_PORT_STS_CMODE_1000BASE_X)
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return MV88E6390_PORT10_LANE1;
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return -ENODEV;
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case 6:
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if (cmode_port10 == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
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cmode_port10 == MV88E6XXX_PORT_STS_CMODE_SGMII ||
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cmode_port10 == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||
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cmode_port10 == MV88E6XXX_PORT_STS_CMODE_RXAUI)
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if (cmode_port == MV88E6XXX_PORT_STS_CMODE_1000BASE_X)
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return MV88E6390_PORT10_LANE2;
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return -ENODEV;
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case 7:
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if (cmode_port10 == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
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cmode_port10 == MV88E6XXX_PORT_STS_CMODE_SGMII ||
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cmode_port10 == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||
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cmode_port10 == MV88E6XXX_PORT_STS_CMODE_RXAUI)
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if (cmode_port == MV88E6XXX_PORT_STS_CMODE_1000BASE_X)
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return MV88E6390_PORT10_LANE3;
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return -ENODEV;
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case 9:
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if (cmode_port9 == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
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cmode_port9 == MV88E6XXX_PORT_STS_CMODE_SGMII ||
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cmode_port9 == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||
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cmode_port9 == MV88E6XXX_PORT_STS_CMODE_XAUI ||
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cmode_port9 == MV88E6XXX_PORT_STS_CMODE_RXAUI)
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return MV88E6390_PORT9_LANE0;
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return -ENODEV;
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case 10:
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if (cmode_port10 == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
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cmode_port10 == MV88E6XXX_PORT_STS_CMODE_SGMII ||
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cmode_port10 == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||
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cmode_port10 == MV88E6XXX_PORT_STS_CMODE_XAUI ||
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cmode_port10 == MV88E6XXX_PORT_STS_CMODE_RXAUI)
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return MV88E6390_PORT10_LANE0;
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return -ENODEV;
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default:
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return -ENODEV;
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}
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}
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/* Set the power on/off for 10GBASE-R and 10GBASE-X4/X2 */
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static int mv88e6390_serdes_power_10g(struct mv88e6xxx_chip *chip, int lane,
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bool on)
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{
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u16 val, new_val;
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int err;
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err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
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MV88E6390_PCS_CONTROL_1, &val);
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if (err)
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return err;
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if (on)
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new_val = val & ~(MV88E6390_PCS_CONTROL_1_RESET |
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MV88E6390_PCS_CONTROL_1_LOOPBACK |
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MV88E6390_PCS_CONTROL_1_PDOWN);
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else
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new_val = val | MV88E6390_PCS_CONTROL_1_PDOWN;
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if (val != new_val)
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err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
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MV88E6390_PCS_CONTROL_1, new_val);
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return err;
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}
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/* Set the power on/off for SGMII and 1000Base-X */
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static int mv88e6390_serdes_power_sgmii(struct mv88e6xxx_chip *chip, int lane,
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bool on)
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{
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u16 val, new_val;
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int err;
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err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
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MV88E6390_SGMII_CONTROL, &val);
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if (err)
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return err;
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|
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if (on)
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new_val = val & ~(MV88E6390_SGMII_CONTROL_RESET |
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MV88E6390_SGMII_CONTROL_LOOPBACK |
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MV88E6390_SGMII_CONTROL_PDOWN);
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else
|
|
new_val = val | MV88E6390_SGMII_CONTROL_PDOWN;
|
|
|
|
if (val != new_val)
|
|
err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
|
|
MV88E6390_SGMII_CONTROL, new_val);
|
|
|
|
return err;
|
|
}
|
|
|
|
static int mv88e6390_serdes_power_lane(struct mv88e6xxx_chip *chip, int port,
|
|
int lane, bool on)
|
|
{
|
|
u8 cmode = chip->ports[port].cmode;
|
|
|
|
switch (cmode) {
|
|
case MV88E6XXX_PORT_STS_CMODE_SGMII:
|
|
case MV88E6XXX_PORT_STS_CMODE_1000BASE_X:
|
|
case MV88E6XXX_PORT_STS_CMODE_2500BASEX:
|
|
return mv88e6390_serdes_power_sgmii(chip, lane, on);
|
|
case MV88E6XXX_PORT_STS_CMODE_XAUI:
|
|
case MV88E6XXX_PORT_STS_CMODE_RXAUI:
|
|
return mv88e6390_serdes_power_10g(chip, lane, on);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on)
|
|
{
|
|
int lane;
|
|
|
|
lane = mv88e6390_serdes_get_lane(chip, port);
|
|
if (lane == -ENODEV)
|
|
return 0;
|
|
|
|
if (lane < 0)
|
|
return lane;
|
|
|
|
switch (port) {
|
|
case 9 ... 10:
|
|
return mv88e6390_serdes_power_lane(chip, port, lane, on);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int mv88e6390x_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on)
|
|
{
|
|
int lane;
|
|
|
|
lane = mv88e6390x_serdes_get_lane(chip, port);
|
|
if (lane == -ENODEV)
|
|
return 0;
|
|
|
|
if (lane < 0)
|
|
return lane;
|
|
|
|
switch (port) {
|
|
case 2 ... 4:
|
|
case 5 ... 7:
|
|
case 9 ... 10:
|
|
return mv88e6390_serdes_power_lane(chip, port, lane, on);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void mv88e6390_serdes_irq_link_sgmii(struct mv88e6xxx_chip *chip,
|
|
int port, int lane)
|
|
{
|
|
struct dsa_switch *ds = chip->ds;
|
|
int duplex = DUPLEX_UNKNOWN;
|
|
int speed = SPEED_UNKNOWN;
|
|
int link, err;
|
|
u16 status;
|
|
|
|
err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
|
|
MV88E6390_SGMII_PHY_STATUS, &status);
|
|
if (err) {
|
|
dev_err(chip->dev, "can't read SGMII PHY status: %d\n", err);
|
|
return;
|
|
}
|
|
|
|
link = status & MV88E6390_SGMII_PHY_STATUS_LINK ?
|
|
LINK_FORCED_UP : LINK_FORCED_DOWN;
|
|
|
|
if (status & MV88E6390_SGMII_PHY_STATUS_SPD_DPL_VALID) {
|
|
duplex = status & MV88E6390_SGMII_PHY_STATUS_DUPLEX_FULL ?
|
|
DUPLEX_FULL : DUPLEX_HALF;
|
|
|
|
switch (status & MV88E6390_SGMII_PHY_STATUS_SPEED_MASK) {
|
|
case MV88E6390_SGMII_PHY_STATUS_SPEED_1000:
|
|
speed = SPEED_1000;
|
|
break;
|
|
case MV88E6390_SGMII_PHY_STATUS_SPEED_100:
|
|
speed = SPEED_100;
|
|
break;
|
|
case MV88E6390_SGMII_PHY_STATUS_SPEED_10:
|
|
speed = SPEED_10;
|
|
break;
|
|
default:
|
|
dev_err(chip->dev, "invalid PHY speed\n");
|
|
return;
|
|
}
|
|
}
|
|
|
|
err = mv88e6xxx_port_setup_mac(chip, port, link, speed, duplex,
|
|
PAUSE_OFF, PHY_INTERFACE_MODE_NA);
|
|
if (err)
|
|
dev_err(chip->dev, "can't propagate PHY settings to MAC: %d\n",
|
|
err);
|
|
else
|
|
dsa_port_phylink_mac_change(ds, port, link == LINK_FORCED_UP);
|
|
}
|
|
|
|
static int mv88e6390_serdes_irq_enable_sgmii(struct mv88e6xxx_chip *chip,
|
|
int lane)
|
|
{
|
|
return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
|
|
MV88E6390_SGMII_INT_ENABLE,
|
|
MV88E6390_SGMII_INT_LINK_DOWN |
|
|
MV88E6390_SGMII_INT_LINK_UP);
|
|
}
|
|
|
|
static int mv88e6390_serdes_irq_disable_sgmii(struct mv88e6xxx_chip *chip,
|
|
int lane)
|
|
{
|
|
return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
|
|
MV88E6390_SGMII_INT_ENABLE, 0);
|
|
}
|
|
|
|
int mv88e6390_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port,
|
|
int lane)
|
|
{
|
|
u8 cmode = chip->ports[port].cmode;
|
|
int err = 0;
|
|
|
|
switch (cmode) {
|
|
case MV88E6XXX_PORT_STS_CMODE_SGMII:
|
|
case MV88E6XXX_PORT_STS_CMODE_1000BASE_X:
|
|
case MV88E6XXX_PORT_STS_CMODE_2500BASEX:
|
|
err = mv88e6390_serdes_irq_enable_sgmii(chip, lane);
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
int mv88e6390_serdes_irq_disable(struct mv88e6xxx_chip *chip, int port,
|
|
int lane)
|
|
{
|
|
u8 cmode = chip->ports[port].cmode;
|
|
int err = 0;
|
|
|
|
switch (cmode) {
|
|
case MV88E6XXX_PORT_STS_CMODE_SGMII:
|
|
case MV88E6XXX_PORT_STS_CMODE_1000BASE_X:
|
|
case MV88E6XXX_PORT_STS_CMODE_2500BASEX:
|
|
err = mv88e6390_serdes_irq_disable_sgmii(chip, lane);
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
static int mv88e6390_serdes_irq_status_sgmii(struct mv88e6xxx_chip *chip,
|
|
int lane, u16 *status)
|
|
{
|
|
int err;
|
|
|
|
err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
|
|
MV88E6390_SGMII_INT_STATUS, status);
|
|
|
|
return err;
|
|
}
|
|
|
|
static irqreturn_t mv88e6390_serdes_thread_fn(int irq, void *dev_id)
|
|
{
|
|
struct mv88e6xxx_port *port = dev_id;
|
|
struct mv88e6xxx_chip *chip = port->chip;
|
|
irqreturn_t ret = IRQ_NONE;
|
|
u8 cmode = port->cmode;
|
|
u16 status;
|
|
int lane;
|
|
int err;
|
|
|
|
lane = mv88e6390x_serdes_get_lane(chip, port->port);
|
|
|
|
mv88e6xxx_reg_lock(chip);
|
|
|
|
switch (cmode) {
|
|
case MV88E6XXX_PORT_STS_CMODE_SGMII:
|
|
case MV88E6XXX_PORT_STS_CMODE_1000BASE_X:
|
|
case MV88E6XXX_PORT_STS_CMODE_2500BASEX:
|
|
err = mv88e6390_serdes_irq_status_sgmii(chip, lane, &status);
|
|
if (err)
|
|
goto out;
|
|
if (status & (MV88E6390_SGMII_INT_LINK_DOWN |
|
|
MV88E6390_SGMII_INT_LINK_UP)) {
|
|
ret = IRQ_HANDLED;
|
|
mv88e6390_serdes_irq_link_sgmii(chip, port->port, lane);
|
|
}
|
|
}
|
|
out:
|
|
mv88e6xxx_reg_unlock(chip);
|
|
|
|
return ret;
|
|
}
|
|
|
|
int mv88e6390x_serdes_irq_setup(struct mv88e6xxx_chip *chip, int port)
|
|
{
|
|
int lane;
|
|
int err;
|
|
|
|
lane = mv88e6390x_serdes_get_lane(chip, port);
|
|
|
|
if (lane == -ENODEV)
|
|
return 0;
|
|
|
|
if (lane < 0)
|
|
return lane;
|
|
|
|
chip->ports[port].serdes_irq = irq_find_mapping(chip->g2_irq.domain,
|
|
port);
|
|
if (chip->ports[port].serdes_irq < 0) {
|
|
dev_err(chip->dev, "Unable to map SERDES irq: %d\n",
|
|
chip->ports[port].serdes_irq);
|
|
return chip->ports[port].serdes_irq;
|
|
}
|
|
|
|
/* Requesting the IRQ will trigger irq callbacks. So we cannot
|
|
* hold the reg_lock.
|
|
*/
|
|
mv88e6xxx_reg_unlock(chip);
|
|
err = request_threaded_irq(chip->ports[port].serdes_irq, NULL,
|
|
mv88e6390_serdes_thread_fn,
|
|
IRQF_ONESHOT, "mv88e6xxx-serdes",
|
|
&chip->ports[port]);
|
|
mv88e6xxx_reg_lock(chip);
|
|
|
|
if (err) {
|
|
dev_err(chip->dev, "Unable to request SERDES interrupt: %d\n",
|
|
err);
|
|
return err;
|
|
}
|
|
|
|
return mv88e6390_serdes_irq_enable(chip, port, lane);
|
|
}
|
|
|
|
int mv88e6390_serdes_irq_setup(struct mv88e6xxx_chip *chip, int port)
|
|
{
|
|
if (port < 9)
|
|
return 0;
|
|
|
|
return mv88e6390x_serdes_irq_setup(chip, port);
|
|
}
|
|
|
|
void mv88e6390x_serdes_irq_free(struct mv88e6xxx_chip *chip, int port)
|
|
{
|
|
int lane = mv88e6390x_serdes_get_lane(chip, port);
|
|
|
|
if (lane == -ENODEV)
|
|
return;
|
|
|
|
if (lane < 0)
|
|
return;
|
|
|
|
mv88e6390_serdes_irq_disable(chip, port, lane);
|
|
|
|
/* Freeing the IRQ will trigger irq callbacks. So we cannot
|
|
* hold the reg_lock.
|
|
*/
|
|
mv88e6xxx_reg_unlock(chip);
|
|
free_irq(chip->ports[port].serdes_irq, &chip->ports[port]);
|
|
mv88e6xxx_reg_lock(chip);
|
|
|
|
chip->ports[port].serdes_irq = 0;
|
|
}
|
|
|
|
void mv88e6390_serdes_irq_free(struct mv88e6xxx_chip *chip, int port)
|
|
{
|
|
if (port < 9)
|
|
return;
|
|
|
|
mv88e6390x_serdes_irq_free(chip, port);
|
|
}
|
|
|
|
int mv88e6341_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on)
|
|
{
|
|
u8 cmode = chip->ports[port].cmode;
|
|
|
|
if (port != 5)
|
|
return 0;
|
|
|
|
if (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
|
|
cmode == MV88E6XXX_PORT_STS_CMODE_SGMII ||
|
|
cmode == MV88E6XXX_PORT_STS_CMODE_2500BASEX)
|
|
return mv88e6390_serdes_power_sgmii(chip, MV88E6341_ADDR_SERDES,
|
|
on);
|
|
|
|
return 0;
|
|
}
|