linux_dsm_epyc7002/arch/arm/boot
Florian Fainelli 9df11828d9 ARM: dts: BCM63xx: fix L2 cache properties
The L2 cache properties were completely off with respect to what the
hardware is configured for. Fix the cache-size, cache-line-size and
cache-sets to reflect the L2 cache controller we have: 512KB, 16 ways
and 32 bytes per cache-line.

Fixes: 46d4bca044 ("ARM: BCM63XX: add BCM63138 minimal Device Tree")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-02-16 12:48:28 -08:00
..
bootp ARM: 8153/1: Enable gcov support on the ARM architecture 2014-09-26 14:39:57 +01:00
compressed ARM: 8191/1: decompressor: ensure I-side picks up relocated code 2014-11-13 23:45:20 +00:00
dts ARM: dts: BCM63xx: fix L2 cache properties 2015-02-16 12:48:28 -08:00
.gitignore
install.sh
Makefile