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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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488f94d721
Current KVM world switch code is unintentionally setting wrong bits to CNTHCTL_EL2 when E2H == 1, which may allow guest OS to access physical timer. Bit positions of CNTHCTL_EL2 are changing depending on HCR_EL2.E2H bit. EL1PCEN and EL1PCTEN are 1st and 0th bits when E2H is not set, but they are 11th and 10th bits respectively when E2H is set. In fact, on VHE we only need to set those bits once, not for every world switch. This is because the host kernel runs in EL2 with HCR_EL2.TGE == 1, which makes those bits have no effect for the host kernel execution. So we just set those bits once for guests, and that's it. Signed-off-by: Jintack Lim <jintack@cs.columbia.edu> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
100 lines
2.7 KiB
C
100 lines
2.7 KiB
C
/*
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* Copyright (c) 2012 Linaro Limited.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#ifndef VIRT_H
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#define VIRT_H
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#include <asm/ptrace.h>
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/*
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* Flag indicating that the kernel was not entered in the same mode on every
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* CPU. The zImage loader stashes this value in an SPSR, so we need an
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* architecturally defined flag bit here.
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*/
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#define BOOT_CPU_MODE_MISMATCH PSR_N_BIT
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#ifndef __ASSEMBLY__
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#include <asm/cacheflush.h>
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#ifdef CONFIG_ARM_VIRT_EXT
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/*
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* __boot_cpu_mode records what mode the primary CPU was booted in.
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* A correctly-implemented bootloader must start all CPUs in the same mode:
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* if it fails to do this, the flag BOOT_CPU_MODE_MISMATCH is set to indicate
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* that some CPU(s) were booted in a different mode.
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*
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* This allows the kernel to flag an error when the secondaries have come up.
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*/
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extern int __boot_cpu_mode;
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static inline void sync_boot_mode(void)
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{
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/*
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* As secondaries write to __boot_cpu_mode with caches disabled, we
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* must flush the corresponding cache entries to ensure the visibility
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* of their writes.
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*/
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sync_cache_r(&__boot_cpu_mode);
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}
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void __hyp_set_vectors(unsigned long phys_vector_base);
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unsigned long __hyp_get_vectors(void);
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#else
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#define __boot_cpu_mode (SVC_MODE)
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#define sync_boot_mode()
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#endif
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#ifndef ZIMAGE
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void hyp_mode_check(void);
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/* Reports the availability of HYP mode */
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static inline bool is_hyp_mode_available(void)
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{
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return ((__boot_cpu_mode & MODE_MASK) == HYP_MODE &&
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!(__boot_cpu_mode & BOOT_CPU_MODE_MISMATCH));
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}
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/* Check if the bootloader has booted CPUs in different modes */
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static inline bool is_hyp_mode_mismatched(void)
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{
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return !!(__boot_cpu_mode & BOOT_CPU_MODE_MISMATCH);
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}
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static inline bool is_kernel_in_hyp_mode(void)
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{
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return false;
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}
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static inline bool has_vhe(void)
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{
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return false;
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}
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/* The section containing the hypervisor idmap text */
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extern char __hyp_idmap_text_start[];
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extern char __hyp_idmap_text_end[];
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/* The section containing the hypervisor text */
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extern char __hyp_text_start[];
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extern char __hyp_text_end[];
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* ! VIRT_H */
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