mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-20 01:58:40 +07:00
8563b1e8ef
The moves a couple of functions programming the gamma LUT and CSC units into their own file. On generations prior to Haswell there is only a gamma LUT. From haswell on there is also a new enhanced color correction unit that isn't used yet. This is why we need to set the GAMMA_MODE register, either we're using the legacy 8bits LUT or enhanced LUTs (of 10 or 12bits). The CSC unit is only available from Haswell on. We also need to make a special case for CherryView which is recognized as a gen 8 but doesn't have the same enhanced color correction unit from Haswell on. v2: Fix access to GAMMA_MODE register on older generations than Haswell (from Matt Roper's comments) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1458125837-2576-2-git-send-email-lionel.g.landwerlin@intel.com
105 lines
2.2 KiB
Makefile
105 lines
2.2 KiB
Makefile
#
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# Makefile for the drm device driver. This driver provides support for the
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# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
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# Please keep these build lists sorted!
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# core driver code
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i915-y := i915_drv.o \
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i915_irq.o \
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i915_params.o \
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i915_suspend.o \
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i915_sysfs.o \
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intel_csr.o \
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intel_pm.o \
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intel_runtime_pm.o
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i915-$(CONFIG_COMPAT) += i915_ioc32.o
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i915-$(CONFIG_DEBUG_FS) += i915_debugfs.o
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# GEM code
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i915-y += i915_cmd_parser.o \
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i915_gem_batch_pool.o \
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i915_gem_context.o \
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i915_gem_debug.o \
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i915_gem_dmabuf.o \
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i915_gem_evict.o \
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i915_gem_execbuffer.o \
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i915_gem_fence.o \
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i915_gem_gtt.o \
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i915_gem.o \
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i915_gem_render_state.o \
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i915_gem_shrinker.o \
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i915_gem_stolen.o \
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i915_gem_tiling.o \
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i915_gem_userptr.o \
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i915_gpu_error.o \
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i915_trace_points.o \
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intel_lrc.o \
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intel_mocs.o \
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intel_ringbuffer.o \
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intel_uncore.o
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# general-purpose microcontroller (GuC) support
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i915-y += intel_guc_loader.o \
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i915_guc_submission.o
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# autogenerated null render state
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i915-y += intel_renderstate_gen6.o \
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intel_renderstate_gen7.o \
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intel_renderstate_gen8.o \
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intel_renderstate_gen9.o
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# modesetting core code
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i915-y += intel_audio.o \
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intel_atomic.o \
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intel_atomic_plane.o \
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intel_bios.o \
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intel_color.o \
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intel_display.o \
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intel_dpll_mgr.o \
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intel_fbc.o \
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intel_fifo_underrun.o \
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intel_frontbuffer.o \
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intel_hotplug.o \
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intel_modes.o \
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intel_overlay.o \
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intel_psr.o \
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intel_sideband.o \
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intel_sprite.o
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i915-$(CONFIG_ACPI) += intel_acpi.o intel_opregion.o
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i915-$(CONFIG_DRM_FBDEV_EMULATION) += intel_fbdev.o
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# modesetting output/encoder code
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i915-y += dvo_ch7017.o \
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dvo_ch7xxx.o \
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dvo_ivch.o \
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dvo_ns2501.o \
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dvo_sil164.o \
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dvo_tfp410.o \
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intel_crt.o \
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intel_ddi.o \
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intel_dp_link_training.o \
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intel_dp_mst.o \
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intel_dp.o \
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intel_dsi.o \
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intel_dsi_panel_vbt.o \
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intel_dsi_pll.o \
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intel_dvo.o \
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intel_hdmi.o \
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intel_i2c.o \
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intel_lvds.o \
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intel_panel.o \
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intel_sdvo.o \
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intel_tv.o
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# virtual gpu code
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i915-y += i915_vgpu.o
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# legacy horrors
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i915-y += i915_dma.o
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obj-$(CONFIG_DRM_I915) += i915.o
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CFLAGS_i915_trace_points.o := -I$(src)
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