mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 16:39:53 +07:00
00eb3630a9
Since commit b36581df7e ("spi: imx: Using existing properties for
chipselects") the device tree property 'fsl,spi-num-chipselects' is
unused and it is already marked as obsolete in device tree binding
documentation. Remove the property from the existing DTS files to
avoid its reoccurence on copying.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
353 lines
7.6 KiB
Plaintext
353 lines
7.6 KiB
Plaintext
/*
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* Copyright 2014 FEDEVEL, Inc.
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*
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* Author: Robert Nelson <robertcnelson@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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chosen {
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stdout-path = &uart1;
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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reg_3p3v: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_usbh1_vbus: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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pinctrl-names = "default";
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regulator-name = "usbh1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_usb_otg_vbus: regulator@2 {
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compatible = "regulator-fixed";
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reg = <2>;
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pinctrl-names = "default";
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_led>;
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led0: usr {
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label = "usr";
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gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
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default-state = "off";
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linux,default-trigger = "heartbeat";
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};
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};
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sound {
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compatible = "fsl,imx6-rex-sgtl5000",
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"fsl,imx-audio-sgtl5000";
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model = "imx6-rex-sgtl5000";
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ssi-controller = <&ssi1>;
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audio-codec = <&codec>;
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audio-routing =
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"MIC_IN", "Mic Jack",
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"Mic Jack", "Mic Bias",
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"Headphone Jack", "HP_OUT";
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mux-int-port = <1>;
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mux-ext-port = <3>;
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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};
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&ecspi2 {
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cs-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi2>;
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status = "okay";
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};
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&ecspi3 {
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cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi3>;
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status = "okay";
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii";
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phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&hdmi {
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ddc-i2c-bus = <&i2c2>;
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status = "okay";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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codec: sgtl5000@0a {
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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clocks = <&clks IMX6QDL_CLK_CKO>;
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VDDA-supply = <®_3p3v>;
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VDDIO-supply = <®_3p3v>;
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};
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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eeprom@57 {
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compatible = "at,24c02";
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reg = <0x57>;
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};
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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imx6qdl-rex {
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pinctrl_hog: hoggrp {
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fsl,pins = <
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/* SGTL5000 sys_mclk */
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MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
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>;
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};
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pinctrl_audmux: audmuxgrp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
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MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
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MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
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MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
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>;
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};
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pinctrl_ecspi2: ecspi2grp {
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fsl,pins = <
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MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
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MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
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MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
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/* CS */
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MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x000b1
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>;
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};
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pinctrl_ecspi3: ecspi3grp {
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fsl,pins = <
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MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO 0x100b1
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MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI 0x100b1
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MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK 0x100b1
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/* CS */
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MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x000b1
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
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MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
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/* Phy reset */
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MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x000b0
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
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MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
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MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
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MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
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>;
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};
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pinctrl_led: ledgrp {
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fsl,pins = <
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/* user led */
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MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
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MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
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>;
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};
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pinctrl_usbh1: usbh1grp {
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fsl,pins = <
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/* power enable, high active */
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MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x10b0
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>;
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};
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pinctrl_usbotg: usbotggrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
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MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
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/* power enable, high active */
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MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x10b0
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
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MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
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MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
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MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
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MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
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MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
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/* CD */
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MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
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/* WP */
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MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1f0b0
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
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/* CD */
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MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
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/* WP */
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MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1f0b0
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>;
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};
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};
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};
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&ssi1 {
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&usbh1 {
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vbus-supply = <®_usbh1_vbus>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbh1>;
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status = "okay";
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};
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&usbotg {
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vbus-supply = <®_usb_otg_vbus>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg>;
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2>;
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bus-width = <4>;
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cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3>;
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bus-width = <4>;
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cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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