mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 10:06:43 +07:00
17e6b00ac4
Pull irq updates from Thomas Gleixner:
"This updated pull request does not contain the last few GIC related
patches which were reported to cause a regression. There is a fix
available, but I let it breed for a couple of days first.
The irq departement provides:
- new infrastructure to support non PCI based MSI interrupts
- a couple of new irq chip drivers
- the usual pile of fixlets and updates to irq chip drivers
- preparatory changes for removal of the irq argument from interrupt
flow handlers
- preparatory changes to remove IRQF_VALID"
* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (129 commits)
irqchip/imx-gpcv2: IMX GPCv2 driver for wakeup sources
irqchip: Add bcm2836 interrupt controller for Raspberry Pi 2
irqchip: Add documentation for the bcm2836 interrupt controller
irqchip/bcm2835: Add support for being used as a second level controller
irqchip/bcm2835: Refactor handle_IRQ() calls out of MAKE_HWIRQ
PCI: xilinx: Fix typo in function name
irqchip/gic: Ensure gic_cpu_if_up/down() programs correct GIC instance
irqchip/gic: Only allow the primary GIC to set the CPU map
PCI/MSI: pci-xgene-msi: Consolidate chained IRQ handler install/remove
unicore32/irq: Prepare puv3_gpio_handler for irq argument removal
tile/pci_gx: Prepare trio_handle_level_irq for irq argument removal
m68k/irq: Prepare irq handlers for irq argument removal
C6X/megamode-pic: Prepare megamod_irq_cascade for irq argument removal
blackfin: Prepare irq handlers for irq argument removal
arc/irq: Prepare idu_cascade_isr for irq argument removal
sparc/irq: Use access helper irq_data_get_affinity_mask()
sparc/irq: Use helper irq_data_get_irq_handler_data()
parisc/irq: Use access helper irq_data_get_affinity_mask()
mn10300/irq: Use access helper irq_data_get_affinity_mask()
irqchip/i8259: Prepare i8259_irq_dispatch for irq argument removal
...
136 lines
3.3 KiB
C
136 lines
3.3 KiB
C
/* MN10300 clockevents
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*
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* Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
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* Written by Mark Salter (msalter@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#include <linux/clockchips.h>
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#include <linux/interrupt.h>
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#include <linux/percpu.h>
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#include <linux/smp.h>
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#include <asm/timex.h>
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#include "internal.h"
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#ifdef CONFIG_SMP
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#if (CONFIG_NR_CPUS > 2) && !defined(CONFIG_GEENERIC_CLOCKEVENTS_BROADCAST)
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#error "This doesn't scale well! Need per-core local timers."
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#endif
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#else /* CONFIG_SMP */
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#define stop_jiffies_counter1()
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#define reload_jiffies_counter1(x)
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#define TMJC1IRQ TMJCIRQ
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#endif
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static int next_event(unsigned long delta,
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struct clock_event_device *evt)
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{
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unsigned int cpu = smp_processor_id();
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if (cpu == 0) {
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stop_jiffies_counter();
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reload_jiffies_counter(delta - 1);
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} else {
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stop_jiffies_counter1();
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reload_jiffies_counter1(delta - 1);
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}
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return 0;
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}
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static DEFINE_PER_CPU(struct clock_event_device, mn10300_clockevent_device);
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static DEFINE_PER_CPU(struct irqaction, timer_irq);
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static irqreturn_t timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *cd;
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unsigned int cpu = smp_processor_id();
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if (cpu == 0)
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stop_jiffies_counter();
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else
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stop_jiffies_counter1();
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cd = &per_cpu(mn10300_clockevent_device, cpu);
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cd->event_handler(cd);
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return IRQ_HANDLED;
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}
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static void event_handler(struct clock_event_device *dev)
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{
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}
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static inline void setup_jiffies_interrupt(int irq,
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struct irqaction *action)
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{
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u16 tmp;
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setup_irq(irq, action);
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set_intr_level(irq, NUM2GxICR_LEVEL(CONFIG_TIMER_IRQ_LEVEL));
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GxICR(irq) |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST;
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tmp = GxICR(irq);
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}
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int __init init_clockevents(void)
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{
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struct clock_event_device *cd;
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struct irqaction *iact;
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unsigned int cpu = smp_processor_id();
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cd = &per_cpu(mn10300_clockevent_device, cpu);
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if (cpu == 0) {
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stop_jiffies_counter();
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cd->irq = TMJCIRQ;
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} else {
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stop_jiffies_counter1();
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cd->irq = TMJC1IRQ;
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}
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cd->name = "Timestamp";
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cd->features = CLOCK_EVT_FEAT_ONESHOT;
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/* Calculate shift/mult. We want to spawn at least 1 second */
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clockevents_calc_mult_shift(cd, MN10300_JCCLK, 1);
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/* Calculate the min / max delta */
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cd->max_delta_ns = clockevent_delta2ns(TMJCBR_MAX, cd);
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cd->min_delta_ns = clockevent_delta2ns(100, cd);
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cd->rating = 200;
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cd->cpumask = cpumask_of(smp_processor_id());
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cd->event_handler = event_handler;
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cd->set_next_event = next_event;
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iact = &per_cpu(timer_irq, cpu);
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iact->flags = IRQF_SHARED | IRQF_TIMER;
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iact->handler = timer_interrupt;
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clockevents_register_device(cd);
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#if defined(CONFIG_SMP) && !defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
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/* setup timer irq affinity so it only runs on this cpu */
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{
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struct irq_data *data;
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data = irq_get_irq_data(cd->irq);
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cpumask_copy(irq_data_get_affinity_mask(data), cpumask_of(cpu));
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iact->flags |= IRQF_NOBALANCING;
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}
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#endif
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if (cpu == 0) {
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reload_jiffies_counter(MN10300_JC_PER_HZ - 1);
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iact->name = "CPU0 Timer";
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} else {
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reload_jiffies_counter1(MN10300_JC_PER_HZ - 1);
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iact->name = "CPU1 Timer";
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}
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setup_jiffies_interrupt(cd->irq, iact);
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return 0;
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}
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