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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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9d56dd3b08
The old ctrl in/out routines are non-portable and unsuitable for cross-platform use. While drivers/sh has already been sanitized, there is still quite a lot of code that is not. This converts the arch/sh/ bits over, which permits us to flag the routines as deprecated whilst still building with -Werror for the architecture code, and to ensure that future users are not added. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
141 lines
3.5 KiB
C
141 lines
3.5 KiB
C
/*
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* arch/sh/mm/cache-sh2a.c
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*
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* Copyright (C) 2008 Yoshinori Sato
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*
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* Released under the terms of the GNU GPL v2.0.
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*/
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <asm/cache.h>
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#include <asm/addrspace.h>
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#include <asm/processor.h>
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#include <asm/cacheflush.h>
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#include <asm/io.h>
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static void sh2a__flush_wback_region(void *start, int size)
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{
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unsigned long v;
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unsigned long begin, end;
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unsigned long flags;
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begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
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end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
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& ~(L1_CACHE_BYTES-1);
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local_irq_save(flags);
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jump_to_uncached();
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for (v = begin; v < end; v+=L1_CACHE_BYTES) {
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unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0);
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int way;
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for (way = 0; way < 4; way++) {
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unsigned long data = __raw_readl(addr | (way << 11));
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if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
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data &= ~SH_CACHE_UPDATED;
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__raw_writel(data, addr | (way << 11));
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}
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}
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}
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back_to_cached();
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local_irq_restore(flags);
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}
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static void sh2a__flush_purge_region(void *start, int size)
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{
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unsigned long v;
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unsigned long begin, end;
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unsigned long flags;
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begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
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end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
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& ~(L1_CACHE_BYTES-1);
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local_irq_save(flags);
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jump_to_uncached();
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for (v = begin; v < end; v+=L1_CACHE_BYTES) {
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__raw_writel((v & CACHE_PHYSADDR_MASK),
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CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
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}
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back_to_cached();
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local_irq_restore(flags);
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}
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static void sh2a__flush_invalidate_region(void *start, int size)
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{
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unsigned long v;
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unsigned long begin, end;
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unsigned long flags;
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begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
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end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
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& ~(L1_CACHE_BYTES-1);
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local_irq_save(flags);
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jump_to_uncached();
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#ifdef CONFIG_CACHE_WRITEBACK
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__raw_writel(__raw_readl(CCR) | CCR_OCACHE_INVALIDATE, CCR);
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/* I-cache invalidate */
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for (v = begin; v < end; v+=L1_CACHE_BYTES) {
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__raw_writel((v & CACHE_PHYSADDR_MASK),
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CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
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}
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#else
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for (v = begin; v < end; v+=L1_CACHE_BYTES) {
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__raw_writel((v & CACHE_PHYSADDR_MASK),
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CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
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__raw_writel((v & CACHE_PHYSADDR_MASK),
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CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
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}
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#endif
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back_to_cached();
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local_irq_restore(flags);
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}
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/* WBack O-Cache and flush I-Cache */
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static void sh2a_flush_icache_range(void *args)
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{
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struct flusher_data *data = args;
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unsigned long start, end;
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unsigned long v;
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unsigned long flags;
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start = data->addr1 & ~(L1_CACHE_BYTES-1);
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end = (data->addr2 + L1_CACHE_BYTES-1) & ~(L1_CACHE_BYTES-1);
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local_irq_save(flags);
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jump_to_uncached();
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for (v = start; v < end; v+=L1_CACHE_BYTES) {
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unsigned long addr = (v & 0x000007f0);
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int way;
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/* O-Cache writeback */
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for (way = 0; way < 4; way++) {
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unsigned long data = __raw_readl(CACHE_OC_ADDRESS_ARRAY | addr | (way << 11));
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if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
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data &= ~SH_CACHE_UPDATED;
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__raw_writel(data, CACHE_OC_ADDRESS_ARRAY | addr | (way << 11));
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}
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}
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/* I-Cache invalidate */
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__raw_writel(addr,
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CACHE_IC_ADDRESS_ARRAY | addr | 0x00000008);
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}
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back_to_cached();
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local_irq_restore(flags);
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}
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void __init sh2a_cache_init(void)
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{
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local_flush_icache_range = sh2a_flush_icache_range;
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__flush_wback_region = sh2a__flush_wback_region;
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__flush_purge_region = sh2a__flush_purge_region;
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__flush_invalidate_region = sh2a__flush_invalidate_region;
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}
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