AuxXxilium/linux_dsm_epyc7002
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linux_dsm_epyc7002/arch/x86/events
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Harry Pan 5b16ef2e43 perf/x86/cstate: Add Jasper Lake CPU support 
The Jasper Lake processor is Tremont microarchitecture, reuse the
glm_cstates table of Goldmont and Goldmont Plus to enable the C-states
residency profiling.

Signed-off-by: Harry Pan <harry.pan@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20200402190658.1.Ic02e891daac41303aed1f2fc6c64f6110edd27bd@changeid
2020-04-22 21:43:12 +02:00
..
amd Merge branch 'x86/cpu' into perf/core, to resolve conflict 2020-03-25 15:20:44 +01:00
intel perf/x86/cstate: Add Jasper Lake CPU support 2020-04-22 21:43:12 +02:00
core.c x86 user stack frame reads: switch to explicit __get_user() 2020-02-15 17:26:26 -05:00
Kconfig License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
Makefile perf/x86: Add MSR probe interface 2019-06-24 19:28:31 +02:00
msr.c perf/x86/msr: Add Tremont support 2020-02-11 13:17:50 +01:00
perf_event.h perf/x86/amd: Add support for Large Increment per Cycle Events 2020-01-17 10:19:26 +01:00
probe.c perf/x86: Add MSR probe interface 2019-06-24 19:28:31 +02:00
probe.h perf/x86: Add MSR probe interface 2019-06-24 19:28:31 +02:00