mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-04 12:57:07 +07:00
9d26d3a8f1
Currently the Linux PCI core does not touch power state of PCI bridges and PCIe ports when system suspend is entered. Leaving them in D0 consumes power unnecessarily and may prevent the CPU from entering deeper C-states. With recent PCIe hardware we can power down the ports to save power given that we take into account few restrictions: - The PCIe port hardware is recent enough, starting from 2015. - Devices connected to PCIe ports are effectively in D3cold once the port is transitioned to D3 (the config space is not accessible anymore and the link may be powered down). - Devices behind the PCIe port need to be allowed to transition to D3cold and back. There is a way both drivers and userspace can forbid this. - If the device behind the PCIe port is capable of waking the system it needs to be able to do so from D3cold. This patch adds a new flag to struct pci_device called 'bridge_d3'. This flag is set and cleared by the PCI core whenever there is a change in power management state of any of the devices behind the PCIe port. When system later on is suspended we only need to check this flag and if it is true transition the port to D3 otherwise we leave it in D0. Also provide override mechanism via command line parameter "pcie_port_pm=[off|force]" that can be used to disable or enable the feature regardless of the BIOS manufacturing date. Tested-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
402 lines
9.8 KiB
C
402 lines
9.8 KiB
C
/*
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* drivers/pci/bus.c
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*
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* From setup-res.c, by:
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* Dave Rusling (david.rusling@reo.mts.dec.com)
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* David Mosberger (davidm@cs.arizona.edu)
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* David Miller (davem@redhat.com)
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* Ivan Kokshaysky (ink@jurassic.park.msu.ru)
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/errno.h>
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#include <linux/ioport.h>
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#include <linux/proc_fs.h>
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#include <linux/slab.h>
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#include "pci.h"
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void pci_add_resource_offset(struct list_head *resources, struct resource *res,
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resource_size_t offset)
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{
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struct resource_entry *entry;
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entry = resource_list_create_entry(res, 0);
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if (!entry) {
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printk(KERN_ERR "PCI: can't add host bridge window %pR\n", res);
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return;
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}
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entry->offset = offset;
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resource_list_add_tail(entry, resources);
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}
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EXPORT_SYMBOL(pci_add_resource_offset);
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void pci_add_resource(struct list_head *resources, struct resource *res)
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{
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pci_add_resource_offset(resources, res, 0);
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}
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EXPORT_SYMBOL(pci_add_resource);
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void pci_free_resource_list(struct list_head *resources)
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{
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resource_list_free(resources);
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}
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EXPORT_SYMBOL(pci_free_resource_list);
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void pci_bus_add_resource(struct pci_bus *bus, struct resource *res,
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unsigned int flags)
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{
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struct pci_bus_resource *bus_res;
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bus_res = kzalloc(sizeof(struct pci_bus_resource), GFP_KERNEL);
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if (!bus_res) {
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dev_err(&bus->dev, "can't add %pR resource\n", res);
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return;
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}
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bus_res->res = res;
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bus_res->flags = flags;
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list_add_tail(&bus_res->list, &bus->resources);
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}
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struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n)
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{
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struct pci_bus_resource *bus_res;
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if (n < PCI_BRIDGE_RESOURCE_NUM)
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return bus->resource[n];
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n -= PCI_BRIDGE_RESOURCE_NUM;
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list_for_each_entry(bus_res, &bus->resources, list) {
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if (n-- == 0)
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return bus_res->res;
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}
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return NULL;
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}
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EXPORT_SYMBOL_GPL(pci_bus_resource_n);
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void pci_bus_remove_resources(struct pci_bus *bus)
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{
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int i;
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struct pci_bus_resource *bus_res, *tmp;
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for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++)
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bus->resource[i] = NULL;
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list_for_each_entry_safe(bus_res, tmp, &bus->resources, list) {
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list_del(&bus_res->list);
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kfree(bus_res);
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}
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}
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static struct pci_bus_region pci_32_bit = {0, 0xffffffffULL};
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#ifdef CONFIG_PCI_BUS_ADDR_T_64BIT
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static struct pci_bus_region pci_64_bit = {0,
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(pci_bus_addr_t) 0xffffffffffffffffULL};
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static struct pci_bus_region pci_high = {(pci_bus_addr_t) 0x100000000ULL,
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(pci_bus_addr_t) 0xffffffffffffffffULL};
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#endif
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/*
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* @res contains CPU addresses. Clip it so the corresponding bus addresses
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* on @bus are entirely within @region. This is used to control the bus
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* addresses of resources we allocate, e.g., we may need a resource that
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* can be mapped by a 32-bit BAR.
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*/
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static void pci_clip_resource_to_region(struct pci_bus *bus,
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struct resource *res,
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struct pci_bus_region *region)
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{
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struct pci_bus_region r;
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pcibios_resource_to_bus(bus, &r, res);
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if (r.start < region->start)
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r.start = region->start;
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if (r.end > region->end)
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r.end = region->end;
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if (r.end < r.start)
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res->end = res->start - 1;
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else
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pcibios_bus_to_resource(bus, res, &r);
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}
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static int pci_bus_alloc_from_region(struct pci_bus *bus, struct resource *res,
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resource_size_t size, resource_size_t align,
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resource_size_t min, unsigned long type_mask,
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resource_size_t (*alignf)(void *,
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const struct resource *,
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resource_size_t,
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resource_size_t),
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void *alignf_data,
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struct pci_bus_region *region)
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{
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int i, ret;
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struct resource *r, avail;
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resource_size_t max;
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type_mask |= IORESOURCE_TYPE_BITS;
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pci_bus_for_each_resource(bus, r, i) {
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resource_size_t min_used = min;
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if (!r)
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continue;
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/* type_mask must match */
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if ((res->flags ^ r->flags) & type_mask)
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continue;
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/* We cannot allocate a non-prefetching resource
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from a pre-fetching area */
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if ((r->flags & IORESOURCE_PREFETCH) &&
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!(res->flags & IORESOURCE_PREFETCH))
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continue;
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avail = *r;
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pci_clip_resource_to_region(bus, &avail, region);
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/*
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* "min" is typically PCIBIOS_MIN_IO or PCIBIOS_MIN_MEM to
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* protect badly documented motherboard resources, but if
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* this is an already-configured bridge window, its start
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* overrides "min".
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*/
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if (avail.start)
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min_used = avail.start;
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max = avail.end;
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/* Ok, try it out.. */
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ret = allocate_resource(r, res, size, min_used, max,
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align, alignf, alignf_data);
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if (ret == 0)
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return 0;
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}
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return -ENOMEM;
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}
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/**
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* pci_bus_alloc_resource - allocate a resource from a parent bus
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* @bus: PCI bus
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* @res: resource to allocate
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* @size: size of resource to allocate
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* @align: alignment of resource to allocate
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* @min: minimum /proc/iomem address to allocate
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* @type_mask: IORESOURCE_* type flags
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* @alignf: resource alignment function
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* @alignf_data: data argument for resource alignment function
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*
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* Given the PCI bus a device resides on, the size, minimum address,
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* alignment and type, try to find an acceptable resource allocation
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* for a specific device resource.
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*/
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int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
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resource_size_t size, resource_size_t align,
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resource_size_t min, unsigned long type_mask,
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resource_size_t (*alignf)(void *,
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const struct resource *,
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resource_size_t,
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resource_size_t),
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void *alignf_data)
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{
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#ifdef CONFIG_PCI_BUS_ADDR_T_64BIT
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int rc;
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if (res->flags & IORESOURCE_MEM_64) {
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rc = pci_bus_alloc_from_region(bus, res, size, align, min,
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type_mask, alignf, alignf_data,
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&pci_high);
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if (rc == 0)
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return 0;
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return pci_bus_alloc_from_region(bus, res, size, align, min,
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type_mask, alignf, alignf_data,
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&pci_64_bit);
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}
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#endif
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return pci_bus_alloc_from_region(bus, res, size, align, min,
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type_mask, alignf, alignf_data,
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&pci_32_bit);
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}
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EXPORT_SYMBOL(pci_bus_alloc_resource);
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/*
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* The @idx resource of @dev should be a PCI-PCI bridge window. If this
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* resource fits inside a window of an upstream bridge, do nothing. If it
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* overlaps an upstream window but extends outside it, clip the resource so
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* it fits completely inside.
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*/
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bool pci_bus_clip_resource(struct pci_dev *dev, int idx)
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{
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struct pci_bus *bus = dev->bus;
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struct resource *res = &dev->resource[idx];
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struct resource orig_res = *res;
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struct resource *r;
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int i;
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pci_bus_for_each_resource(bus, r, i) {
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resource_size_t start, end;
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if (!r)
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continue;
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if (resource_type(res) != resource_type(r))
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continue;
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start = max(r->start, res->start);
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end = min(r->end, res->end);
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if (start > end)
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continue; /* no overlap */
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if (res->start == start && res->end == end)
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return false; /* no change */
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res->start = start;
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res->end = end;
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res->flags &= ~IORESOURCE_UNSET;
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orig_res.flags &= ~IORESOURCE_UNSET;
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dev_printk(KERN_DEBUG, &dev->dev, "%pR clipped to %pR\n",
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&orig_res, res);
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return true;
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}
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return false;
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}
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void __weak pcibios_resource_survey_bus(struct pci_bus *bus) { }
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void __weak pcibios_bus_add_device(struct pci_dev *pdev) { }
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/**
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* pci_bus_add_device - start driver for a single device
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* @dev: device to add
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*
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* This adds add sysfs entries and start device drivers
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*/
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void pci_bus_add_device(struct pci_dev *dev)
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{
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int retval;
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/*
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* Can not put in pci_device_add yet because resources
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* are not assigned yet for some devices.
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*/
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pcibios_bus_add_device(dev);
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pci_fixup_device(pci_fixup_final, dev);
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pci_create_sysfs_dev_files(dev);
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pci_proc_attach_device(dev);
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pci_bridge_d3_device_changed(dev);
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dev->match_driver = true;
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retval = device_attach(&dev->dev);
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if (retval < 0 && retval != -EPROBE_DEFER) {
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dev_warn(&dev->dev, "device attach failed (%d)\n", retval);
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pci_proc_detach_device(dev);
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pci_remove_sysfs_dev_files(dev);
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return;
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}
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dev->is_added = 1;
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}
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EXPORT_SYMBOL_GPL(pci_bus_add_device);
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/**
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* pci_bus_add_devices - start driver for PCI devices
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* @bus: bus to check for new devices
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*
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* Start driver for PCI devices and add some sysfs entries.
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*/
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void pci_bus_add_devices(const struct pci_bus *bus)
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{
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struct pci_dev *dev;
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struct pci_bus *child;
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list_for_each_entry(dev, &bus->devices, bus_list) {
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/* Skip already-added devices */
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if (dev->is_added)
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continue;
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pci_bus_add_device(dev);
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}
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list_for_each_entry(dev, &bus->devices, bus_list) {
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/* Skip if device attach failed */
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if (!dev->is_added)
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continue;
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child = dev->subordinate;
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if (child)
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pci_bus_add_devices(child);
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}
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}
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EXPORT_SYMBOL(pci_bus_add_devices);
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/** pci_walk_bus - walk devices on/under bus, calling callback.
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* @top bus whose devices should be walked
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* @cb callback to be called for each device found
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* @userdata arbitrary pointer to be passed to callback.
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*
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* Walk the given bus, including any bridged devices
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* on buses under this bus. Call the provided callback
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* on each device found.
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*
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* We check the return of @cb each time. If it returns anything
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* other than 0, we break out.
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*
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*/
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void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
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void *userdata)
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{
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struct pci_dev *dev;
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struct pci_bus *bus;
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struct list_head *next;
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int retval;
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bus = top;
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down_read(&pci_bus_sem);
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next = top->devices.next;
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for (;;) {
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if (next == &bus->devices) {
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/* end of this bus, go up or finish */
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if (bus == top)
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break;
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next = bus->self->bus_list.next;
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bus = bus->self->bus;
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continue;
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}
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dev = list_entry(next, struct pci_dev, bus_list);
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if (dev->subordinate) {
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/* this is a pci-pci bridge, do its devices next */
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next = dev->subordinate->devices.next;
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bus = dev->subordinate;
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} else
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next = dev->bus_list.next;
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retval = cb(dev, userdata);
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if (retval)
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break;
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}
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up_read(&pci_bus_sem);
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}
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EXPORT_SYMBOL_GPL(pci_walk_bus);
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struct pci_bus *pci_bus_get(struct pci_bus *bus)
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{
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if (bus)
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get_device(&bus->dev);
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return bus;
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}
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EXPORT_SYMBOL(pci_bus_get);
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void pci_bus_put(struct pci_bus *bus)
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{
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if (bus)
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put_device(&bus->dev);
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}
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EXPORT_SYMBOL(pci_bus_put);
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