mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
e55645ec57
All the ia64 pvops code is now dead code since both xen and kvm support have been ripped out [0] [1]. Just that no one had troubled to rip this stuff out. The only useful remaining pieces were the old pvops docs but that was recently also generalized and moved out from ia64 [2]. This has been run time tested on an ia64 Madison system. [0]003f7de625"KVM: ia64: remove" since v3.19-rc1 [1]d52eefb47d"ia64/xen: Remove Xen support for ia64" since v3.14-rc1 [2] "virtual: Documentation: simplify and generalize paravirt_ops.txt" Signed-off-by: Luis R. Rodriguez <mcgrof@suse.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
134 lines
2.9 KiB
C
134 lines
2.9 KiB
C
/******************************************************************************
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* arch/ia64/include/asm/native/inst.h
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*
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* Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
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* VA Linux Systems Japan K.K.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#define DO_SAVE_MIN IA64_NATIVE_DO_SAVE_MIN
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#define MOV_FROM_IFA(reg) \
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mov reg = cr.ifa
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#define MOV_FROM_ITIR(reg) \
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mov reg = cr.itir
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#define MOV_FROM_ISR(reg) \
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mov reg = cr.isr
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#define MOV_FROM_IHA(reg) \
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mov reg = cr.iha
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#define MOV_FROM_IPSR(pred, reg) \
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(pred) mov reg = cr.ipsr
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#define MOV_FROM_IIM(reg) \
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mov reg = cr.iim
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#define MOV_FROM_IIP(reg) \
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mov reg = cr.iip
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#define MOV_FROM_IVR(reg, clob) \
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mov reg = cr.ivr
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#define MOV_FROM_PSR(pred, reg, clob) \
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(pred) mov reg = psr
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#define MOV_FROM_ITC(pred, pred_clob, reg, clob) \
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(pred) mov reg = ar.itc
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#define MOV_TO_IFA(reg, clob) \
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mov cr.ifa = reg
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#define MOV_TO_ITIR(pred, reg, clob) \
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(pred) mov cr.itir = reg
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#define MOV_TO_IHA(pred, reg, clob) \
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(pred) mov cr.iha = reg
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#define MOV_TO_IPSR(pred, reg, clob) \
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(pred) mov cr.ipsr = reg
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#define MOV_TO_IFS(pred, reg, clob) \
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(pred) mov cr.ifs = reg
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#define MOV_TO_IIP(reg, clob) \
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mov cr.iip = reg
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#define MOV_TO_KR(kr, reg, clob0, clob1) \
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mov IA64_KR(kr) = reg
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#define ITC_I(pred, reg, clob) \
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(pred) itc.i reg
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#define ITC_D(pred, reg, clob) \
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(pred) itc.d reg
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#define ITC_I_AND_D(pred_i, pred_d, reg, clob) \
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(pred_i) itc.i reg; \
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(pred_d) itc.d reg
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#define THASH(pred, reg0, reg1, clob) \
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(pred) thash reg0 = reg1
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#define SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(clob0, clob1) \
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ssm psr.ic | PSR_DEFAULT_BITS \
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;; \
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srlz.i /* guarantee that interruption collectin is on */ \
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;;
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#define SSM_PSR_IC_AND_SRLZ_D(clob0, clob1) \
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ssm psr.ic \
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;; \
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srlz.d
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#define RSM_PSR_IC(clob) \
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rsm psr.ic
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#define SSM_PSR_I(pred, pred_clob, clob) \
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(pred) ssm psr.i
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#define RSM_PSR_I(pred, clob0, clob1) \
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(pred) rsm psr.i
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#define RSM_PSR_I_IC(clob0, clob1, clob2) \
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rsm psr.i | psr.ic
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#define RSM_PSR_DT \
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rsm psr.dt
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#define RSM_PSR_BE_I(clob0, clob1) \
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rsm psr.be | psr.i
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#define SSM_PSR_DT_AND_SRLZ_I \
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ssm psr.dt \
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;; \
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srlz.i
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#define BSW_0(clob0, clob1, clob2) \
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bsw.0
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#define BSW_1(clob0, clob1) \
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bsw.1
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#define COVER \
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cover
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#define RFI \
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rfi
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