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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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99be0245c8
Some style fixes in twl4030-madc driver. Reported-by: Jonathan Cameron <jic23@kernel.org> Reported-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Sebastian Reichel <sre@debian.org> Acked-by: Jonathan Cameron <jic23@kernel.org> Tested-by: Marek Belisko <marek@goldelico.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
148 lines
4.0 KiB
C
148 lines
4.0 KiB
C
/*
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* twl4030_madc.h - Header for TWL4030 MADC
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*
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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* J Keerthy <j-keerthy@ti.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#ifndef _TWL4030_MADC_H
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#define _TWL4030_MADC_H
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struct twl4030_madc_conversion_method {
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u8 sel;
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u8 avg;
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u8 rbase;
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u8 ctrl;
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};
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#define TWL4030_MADC_MAX_CHANNELS 16
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/*
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* twl4030_madc_request- madc request packet for channel conversion
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* @channels: 16 bit bitmap for individual channels
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* @do_avgP: sample the input channel for 4 consecutive cycles
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* @method: RT, SW1, SW2
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* @type: Polling or interrupt based method
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* @raw: Return raw value, do not convert it
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*/
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struct twl4030_madc_request {
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unsigned long channels;
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bool do_avg;
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u16 method;
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u16 type;
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bool active;
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bool result_pending;
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bool raw;
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int rbuf[TWL4030_MADC_MAX_CHANNELS];
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void (*func_cb)(int len, int channels, int *buf);
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};
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enum conversion_methods {
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TWL4030_MADC_RT,
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TWL4030_MADC_SW1,
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TWL4030_MADC_SW2,
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TWL4030_MADC_NUM_METHODS
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};
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enum sample_type {
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TWL4030_MADC_WAIT,
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TWL4030_MADC_IRQ_ONESHOT,
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TWL4030_MADC_IRQ_REARM
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};
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#define TWL4030_MADC_CTRL1 0x00
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#define TWL4030_MADC_CTRL2 0x01
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#define TWL4030_MADC_RTSELECT_LSB 0x02
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#define TWL4030_MADC_SW1SELECT_LSB 0x06
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#define TWL4030_MADC_SW2SELECT_LSB 0x0A
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#define TWL4030_MADC_RTAVERAGE_LSB 0x04
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#define TWL4030_MADC_SW1AVERAGE_LSB 0x08
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#define TWL4030_MADC_SW2AVERAGE_LSB 0x0C
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#define TWL4030_MADC_CTRL_SW1 0x12
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#define TWL4030_MADC_CTRL_SW2 0x13
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#define TWL4030_MADC_RTCH0_LSB 0x17
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#define TWL4030_MADC_GPCH0_LSB 0x37
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#define TWL4030_MADC_MADCON (1 << 0) /* MADC power on */
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#define TWL4030_MADC_BUSY (1 << 0) /* MADC busy */
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/* MADC conversion completion */
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#define TWL4030_MADC_EOC_SW (1 << 1)
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/* MADC SWx start conversion */
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#define TWL4030_MADC_SW_START (1 << 5)
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#define TWL4030_MADC_ADCIN0 (1 << 0)
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#define TWL4030_MADC_ADCIN1 (1 << 1)
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#define TWL4030_MADC_ADCIN2 (1 << 2)
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#define TWL4030_MADC_ADCIN3 (1 << 3)
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#define TWL4030_MADC_ADCIN4 (1 << 4)
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#define TWL4030_MADC_ADCIN5 (1 << 5)
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#define TWL4030_MADC_ADCIN6 (1 << 6)
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#define TWL4030_MADC_ADCIN7 (1 << 7)
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#define TWL4030_MADC_ADCIN8 (1 << 8)
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#define TWL4030_MADC_ADCIN9 (1 << 9)
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#define TWL4030_MADC_ADCIN10 (1 << 10)
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#define TWL4030_MADC_ADCIN11 (1 << 11)
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#define TWL4030_MADC_ADCIN12 (1 << 12)
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#define TWL4030_MADC_ADCIN13 (1 << 13)
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#define TWL4030_MADC_ADCIN14 (1 << 14)
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#define TWL4030_MADC_ADCIN15 (1 << 15)
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/* Fixed channels */
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#define TWL4030_MADC_BTEMP TWL4030_MADC_ADCIN1
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#define TWL4030_MADC_VBUS TWL4030_MADC_ADCIN8
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#define TWL4030_MADC_VBKB TWL4030_MADC_ADCIN9
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#define TWL4030_MADC_ICHG TWL4030_MADC_ADCIN10
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#define TWL4030_MADC_VCHG TWL4030_MADC_ADCIN11
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#define TWL4030_MADC_VBAT TWL4030_MADC_ADCIN12
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/* Step size and prescaler ratio */
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#define TEMP_STEP_SIZE 147
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#define TEMP_PSR_R 100
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#define CURR_STEP_SIZE 147
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#define CURR_PSR_R1 44
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#define CURR_PSR_R2 88
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#define TWL4030_BCI_BCICTL1 0x23
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#define TWL4030_BCI_CGAIN 0x020
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#define TWL4030_BCI_MESBAT (1 << 1)
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#define TWL4030_BCI_TYPEN (1 << 4)
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#define TWL4030_BCI_ITHEN (1 << 3)
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#define REG_BCICTL2 0x024
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#define TWL4030_BCI_ITHSENS 0x007
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/* Register and bits for GPBR1 register */
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#define TWL4030_REG_GPBR1 0x0c
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#define TWL4030_GPBR1_MADC_HFCLK_EN (1 << 7)
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struct twl4030_madc_user_parms {
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int channel;
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int average;
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int status;
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u16 result;
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};
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int twl4030_madc_conversion(struct twl4030_madc_request *conv);
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int twl4030_get_madc_conversion(int channel_no);
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#endif
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