mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
19fbbbbcd3
This driver supports the TI CDCE925 programmable clock synthesizer. The chip contains two PLLs with spread-spectrum clocking support and five output dividers. The driver only supports the following setup, and uses a fixed setting for the output muxes: Y1 is derived from the input clock Y2 and Y3 derive from PLL1 Y4 and Y5 derive from PLL2 Given a target output frequency, the driver will set the PLL and divider to best approximate the desired output. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michael Turquette <mturquette@linaro.org>
43 lines
1.3 KiB
Plaintext
43 lines
1.3 KiB
Plaintext
Binding for TO CDCE925 programmable I2C clock synthesizers.
|
|
|
|
Reference
|
|
This binding uses the common clock binding[1].
|
|
|
|
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
|
|
[2] http://www.ti.com/product/cdce925
|
|
|
|
The driver provides clock sources for each output Y1 through Y5.
|
|
|
|
Required properties:
|
|
- compatible: Shall be "ti,cdce925"
|
|
- reg: I2C device address.
|
|
- clocks: Points to a fixed parent clock that provides the input frequency.
|
|
- #clock-cells: From common clock bindings: Shall be 1.
|
|
|
|
Optional properties:
|
|
- xtal-load-pf: Crystal load-capacitor value to fine-tune performance on a
|
|
board, or to compensate for external influences.
|
|
|
|
For both PLL1 and PLL2 an optional child node can be used to specify spread
|
|
spectrum clocking parameters for a board.
|
|
- spread-spectrum: SSC mode as defined in the data sheet.
|
|
- spread-spectrum-center: Use "centered" mode instead of "max" mode. When
|
|
present, the clock runs at the requested frequency on average. Otherwise
|
|
the requested frequency is the maximum value of the SCC range.
|
|
|
|
|
|
Example:
|
|
|
|
clockgen: cdce925pw@64 {
|
|
compatible = "cdce925";
|
|
reg = <0x64>;
|
|
clocks = <&xtal_27Mhz>;
|
|
#clock-cells = <1>;
|
|
xtal-load-pf = <5>;
|
|
/* PLL options to get SSC 1% centered */
|
|
PLL2 {
|
|
spread-spectrum = <4>;
|
|
spread-spectrum-center;
|
|
};
|
|
};
|