mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 17:01:57 +07:00
a439fe51a1
The majority of this patch was created by the following script: *** ASM=arch/sparc/include/asm mkdir -p $ASM git mv include/asm-sparc64/ftrace.h $ASM git rm include/asm-sparc64/* git mv include/asm-sparc/* $ASM sed -ie 's/asm-sparc64/asm/g' $ASM/* sed -ie 's/asm-sparc/asm/g' $ASM/* *** The rest was an update of the top-level Makefile to use sparc for header files when sparc64 is being build. And a small fixlet to pick up the correct unistd.h from sparc64 code. Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
28 lines
1.4 KiB
C
28 lines
1.4 KiB
C
#ifndef _SPARC64_DCU_H
|
|
#define _SPARC64_DCU_H
|
|
|
|
#include <linux/const.h>
|
|
|
|
/* UltraSparc-III Data Cache Unit Control Register */
|
|
#define DCU_CP _AC(0x0002000000000000,UL) /* Phys Cache Enable w/o mmu */
|
|
#define DCU_CV _AC(0x0001000000000000,UL) /* Virt Cache Enable w/o mmu */
|
|
#define DCU_ME _AC(0x0000800000000000,UL) /* NC-store Merging Enable */
|
|
#define DCU_RE _AC(0x0000400000000000,UL) /* RAW bypass Enable */
|
|
#define DCU_PE _AC(0x0000200000000000,UL) /* PCache Enable */
|
|
#define DCU_HPE _AC(0x0000100000000000,UL) /* HW prefetch Enable */
|
|
#define DCU_SPE _AC(0x0000080000000000,UL) /* SW prefetch Enable */
|
|
#define DCU_SL _AC(0x0000040000000000,UL) /* Secondary ld-steering Enab*/
|
|
#define DCU_WE _AC(0x0000020000000000,UL) /* WCache enable */
|
|
#define DCU_PM _AC(0x000001fe00000000,UL) /* PA Watchpoint Byte Mask */
|
|
#define DCU_VM _AC(0x00000001fe000000,UL) /* VA Watchpoint Byte Mask */
|
|
#define DCU_PR _AC(0x0000000001000000,UL) /* PA Watchpoint Read Enable */
|
|
#define DCU_PW _AC(0x0000000000800000,UL) /* PA Watchpoint Write Enable*/
|
|
#define DCU_VR _AC(0x0000000000400000,UL) /* VA Watchpoint Read Enable */
|
|
#define DCU_VW _AC(0x0000000000200000,UL) /* VA Watchpoint Write Enable*/
|
|
#define DCU_DM _AC(0x0000000000000008,UL) /* DMMU Enable */
|
|
#define DCU_IM _AC(0x0000000000000004,UL) /* IMMU Enable */
|
|
#define DCU_DC _AC(0x0000000000000002,UL) /* Data Cache Enable */
|
|
#define DCU_IC _AC(0x0000000000000001,UL) /* Instruction Cache Enable */
|
|
|
|
#endif /* _SPARC64_DCU_H */
|