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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ca585cf9fb
Adds basic platform devices for Loongson 1B, including serial port, ethernet, USB, RTC and interrupt handler. The Loongson 1B UART is compatible with NS16550A, the Loongson 1B GMAC is built around a Synopsys IP Core. Use normal instead of enhanced descriptors. Thanks to Giuseppe for updating the normal descriptor in stmmac driver. Thanks to Zhao Zhang for implementing the RTC driver. Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: wuzhangjin@gmail.com Cc: zhzhl555@gmail.com Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/4133/ Patchwork: https://patchwork.linux-mips.org/patch/4134/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
23 lines
709 B
C
23 lines
709 B
C
/*
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* Copyright (c) 2011 Zhang, Keguang <keguang.zhang@gmail.com>
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*
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* Loongson 1 watchdog register definitions.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef __ASM_MACH_LOONGSON1_REGS_WDT_H
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#define __ASM_MACH_LOONGSON1_REGS_WDT_H
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#define LS1X_WDT_REG(x) \
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((void __iomem *)KSEG1ADDR(LS1X_WDT_BASE + (x)))
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#define LS1X_WDT_EN LS1X_WDT_REG(0x0)
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#define LS1X_WDT_SET LS1X_WDT_REG(0x4)
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#define LS1X_WDT_TIMER LS1X_WDT_REG(0x8)
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#endif /* __ASM_MACH_LOONGSON1_REGS_WDT_H */
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