Vladimir Oltean ffe10e679c net: dsa: sja1105: Add support for the SGMII port ... SJA1105 switches R and S have one SerDes port with an 802.3z quasi-compatible PCS, hardwired on port 4. The other ports are still MII/RMII/RGMII. The PCS performs rate adaptation to lower link speeds; the MAC on this port is hardwired at gigabit. Only full duplex is supported. The SGMII port can be configured as part of the static config tables, as well as through a dedicated SPI address region for its pseudo-clause-22 registers. However it looks like the static configuration is not able to change some out-of-reset values (like the value of MII_BMCR), so at the end of the day, having code for it is utterly pointless. We are just going to use the pseudo-C22 interface. Because the PCS gets reset when the switch resets, we have to add even more restoration logic to sja1105_static_config_reload, otherwise the SGMII port breaks after operations such as enabling PTP timestamping which require a switch reset. >From PHYLINK perspective, the switch supports *only* SGMII (it doesn't support 1000Base-X). It also doesn't expose access to the raw config word for in-band AN in registers MII_ADV/MII_LPA. It is able to work in the following modes: - Forced speed - SGMII in-band AN slave (speed received from PHY) - SGMII in-band AN master (acting as a PHY) The latter mode is not supported by this patch. It is even unclear to me how that would be described. There is some code for it left in the patch, but 'an_master' is always passed as false. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>		2020-03-20 08:55:21 -07:00
..
b53	net: dsa: propagate resolved link config via mac_link_up()	2020-02-27 12:02:14 -08:00
microchip	net: dsa: microchip: use delayed_work instead of timer + work	2020-03-10 16:10:19 -07:00
mv88e6xxx	net: dsa: mv88e6xxx: use PHY_DETECT in mac_link_up/mac_link_down	2020-03-15 17:11:12 -07:00
ocelot	net: dsa: felix: Allow unknown unicast traffic towards the CPU port module	2020-03-04 14:19:01 -08:00
qca	net: dsa: propagate resolved link config via mac_link_up()	2020-02-27 12:02:14 -08:00
sja1105	net: dsa: sja1105: Add support for the SGMII port	2020-03-20 08:55:21 -07:00
bcm_sf2_cfp.c
bcm_sf2_regs.h	Revert "net: dsa: bcm_sf2: Also configure Port 5 for 2Gb/sec on 7278"	2020-02-26 16:33:35 -08:00
bcm_sf2.c	Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net	2020-02-27 18:31:39 -08:00
bcm_sf2.h
dsa_loop_bdinfo.c
dsa_loop.c
dsa_loop.h
Kconfig
lan9303_i2c.c
lan9303_mdio.c
lan9303-core.c
lan9303.h
lantiq_gswip.c	net: dsa: propagate resolved link config via mac_link_up()	2020-02-27 12:02:14 -08:00
lantiq_pce.h
Makefile
mt7530.c	net: dsa: mt7530: add support for port mirroring	2020-03-09 19:25:04 -07:00
mt7530.h	net: dsa: mt7530: fix macro MIRROR_PORT	2020-03-10 16:12:54 -07:00
mv88e6060.c
mv88e6060.h
qca8k.c
qca8k.h
realtek-smi-core.c
realtek-smi-core.h
rtl8366.c
rtl8366rb.c
vitesse-vsc73xx-core.c
vitesse-vsc73xx-platform.c
vitesse-vsc73xx-spi.c
vitesse-vsc73xx.h