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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-29 20:46:41 +07:00
7063c0d942
dw_spi driver in upstream only supports PIO mode, and this patch will support it to cowork with the Designware dma controller used on Intel Moorestown platform, at the same time it provides a general framework to support dw_spi core to cowork with dma controllers on other platforms It has been tested with a Option GTM501L 3G modem and Infenion 60x60 modem. To use DMA mode, DMA controller 2 of Moorestown has to be enabled Also change the dma interface suggested by Linus Walleij. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Feng Tang <feng.tang@intel.com> [Typo fix and renames to match intel_mid_dma renaming] Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
181 lines
4.1 KiB
C
181 lines
4.1 KiB
C
/*
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* dw_spi_pci.c - PCI interface driver for DW SPI Core
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*
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* Copyright (c) 2009, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include <linux/interrupt.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/spi/dw_spi.h>
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#include <linux/spi/spi.h>
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#define DRIVER_NAME "dw_spi_pci"
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struct dw_spi_pci {
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struct pci_dev *pdev;
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struct dw_spi dws;
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};
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static int __devinit spi_pci_probe(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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struct dw_spi_pci *dwpci;
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struct dw_spi *dws;
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int pci_bar = 0;
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int ret;
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printk(KERN_INFO "DW: found PCI SPI controller(ID: %04x:%04x)\n",
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pdev->vendor, pdev->device);
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ret = pci_enable_device(pdev);
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if (ret)
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return ret;
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dwpci = kzalloc(sizeof(struct dw_spi_pci), GFP_KERNEL);
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if (!dwpci) {
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ret = -ENOMEM;
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goto err_disable;
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}
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dwpci->pdev = pdev;
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dws = &dwpci->dws;
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/* Get basic io resource and map it */
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dws->paddr = pci_resource_start(pdev, pci_bar);
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dws->iolen = pci_resource_len(pdev, pci_bar);
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ret = pci_request_region(pdev, pci_bar, dev_name(&pdev->dev));
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if (ret)
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goto err_kfree;
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dws->regs = ioremap_nocache((unsigned long)dws->paddr,
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pci_resource_len(pdev, pci_bar));
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if (!dws->regs) {
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ret = -ENOMEM;
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goto err_release_reg;
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}
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dws->parent_dev = &pdev->dev;
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dws->bus_num = 0;
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dws->num_cs = 4;
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dws->irq = pdev->irq;
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/*
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* Specific handling for Intel MID paltforms, like dma setup,
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* clock rate, FIFO depth.
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*/
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if (pdev->device == 0x0800) {
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ret = dw_spi_mid_init(dws);
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if (ret)
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goto err_unmap;
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}
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ret = dw_spi_add_host(dws);
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if (ret)
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goto err_unmap;
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/* PCI hook and SPI hook use the same drv data */
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pci_set_drvdata(pdev, dwpci);
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return 0;
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err_unmap:
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iounmap(dws->regs);
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err_release_reg:
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pci_release_region(pdev, pci_bar);
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err_kfree:
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kfree(dwpci);
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err_disable:
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pci_disable_device(pdev);
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return ret;
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}
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static void __devexit spi_pci_remove(struct pci_dev *pdev)
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{
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struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
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pci_set_drvdata(pdev, NULL);
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dw_spi_remove_host(&dwpci->dws);
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iounmap(dwpci->dws.regs);
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pci_release_region(pdev, 0);
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kfree(dwpci);
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pci_disable_device(pdev);
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}
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#ifdef CONFIG_PM
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static int spi_suspend(struct pci_dev *pdev, pm_message_t state)
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{
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struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
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int ret;
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ret = dw_spi_suspend_host(&dwpci->dws);
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if (ret)
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return ret;
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pci_save_state(pdev);
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pci_disable_device(pdev);
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pci_set_power_state(pdev, pci_choose_state(pdev, state));
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return ret;
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}
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static int spi_resume(struct pci_dev *pdev)
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{
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struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
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int ret;
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pci_set_power_state(pdev, PCI_D0);
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pci_restore_state(pdev);
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ret = pci_enable_device(pdev);
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if (ret)
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return ret;
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return dw_spi_resume_host(&dwpci->dws);
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}
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#else
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#define spi_suspend NULL
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#define spi_resume NULL
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#endif
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static const struct pci_device_id pci_ids[] __devinitdata = {
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/* Intel MID platform SPI controller 0 */
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0800) },
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{},
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};
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static struct pci_driver dw_spi_driver = {
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.name = DRIVER_NAME,
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.id_table = pci_ids,
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.probe = spi_pci_probe,
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.remove = __devexit_p(spi_pci_remove),
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.suspend = spi_suspend,
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.resume = spi_resume,
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};
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static int __init mrst_spi_init(void)
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{
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return pci_register_driver(&dw_spi_driver);
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}
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static void __exit mrst_spi_exit(void)
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{
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pci_unregister_driver(&dw_spi_driver);
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}
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module_init(mrst_spi_init);
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module_exit(mrst_spi_exit);
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MODULE_AUTHOR("Feng Tang <feng.tang@intel.com>");
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MODULE_DESCRIPTION("PCI interface driver for DW SPI Core");
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MODULE_LICENSE("GPL v2");
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