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Most platforms end up using a mix of basic clock types and some which use clk_hw_foo struct for filling in custom platform information when the clocks don't fit into basic types supported. In platform code, its useful to know if a clock is using a basic type or clk_hw_foo, which helps platforms know if they can safely use to_clk_hw_foo to derive the clk_hw_foo pointer from clk_hw. Mark all basic clocks with a CLK_IS_BASIC flag. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
210 lines
5.9 KiB
C
210 lines
5.9 KiB
C
/*
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* linux/include/linux/clk-private.h
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*
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* Copyright (c) 2010-2011 Jeremy Kerr <jeremy.kerr@canonical.com>
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* Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __LINUX_CLK_PRIVATE_H
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#define __LINUX_CLK_PRIVATE_H
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#include <linux/clk-provider.h>
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#include <linux/list.h>
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/*
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* WARNING: Do not include clk-private.h from any file that implements struct
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* clk_ops. Doing so is a layering violation!
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*
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* This header exists only to allow for statically initialized clock data. Any
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* static clock data must be defined in a separate file from the logic that
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* implements the clock operations for that same data.
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*/
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#ifdef CONFIG_COMMON_CLK
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struct clk {
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const char *name;
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const struct clk_ops *ops;
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struct clk_hw *hw;
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struct clk *parent;
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const char **parent_names;
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struct clk **parents;
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u8 num_parents;
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unsigned long rate;
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unsigned long new_rate;
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unsigned long flags;
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unsigned int enable_count;
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unsigned int prepare_count;
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struct hlist_head children;
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struct hlist_node child_node;
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unsigned int notifier_count;
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#ifdef CONFIG_COMMON_CLK_DEBUG
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struct dentry *dentry;
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#endif
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};
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/*
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* DOC: Basic clock implementations common to many platforms
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*
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* Each basic clock hardware type is comprised of a structure describing the
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* clock hardware, implementations of the relevant callbacks in struct clk_ops,
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* unique flags for that hardware type, a registration function and an
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* alternative macro for static initialization
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*/
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#define DEFINE_CLK(_name, _ops, _flags, _parent_names, \
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_parents) \
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static struct clk _name = { \
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.name = #_name, \
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.ops = &_ops, \
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.hw = &_name##_hw.hw, \
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.parent_names = _parent_names, \
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.num_parents = ARRAY_SIZE(_parent_names), \
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.parents = _parents, \
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.flags = _flags | CLK_IS_BASIC, \
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}
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#define DEFINE_CLK_FIXED_RATE(_name, _flags, _rate, \
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_fixed_rate_flags) \
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static struct clk _name; \
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static const char *_name##_parent_names[] = {}; \
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static struct clk_fixed_rate _name##_hw = { \
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.hw = { \
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.clk = &_name, \
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}, \
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.fixed_rate = _rate, \
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.flags = _fixed_rate_flags, \
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}; \
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DEFINE_CLK(_name, clk_fixed_rate_ops, _flags, \
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_name##_parent_names, NULL);
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#define DEFINE_CLK_GATE(_name, _parent_name, _parent_ptr, \
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_flags, _reg, _bit_idx, \
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_gate_flags, _lock) \
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static struct clk _name; \
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static const char *_name##_parent_names[] = { \
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_parent_name, \
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}; \
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static struct clk *_name##_parents[] = { \
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_parent_ptr, \
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}; \
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static struct clk_gate _name##_hw = { \
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.hw = { \
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.clk = &_name, \
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}, \
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.reg = _reg, \
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.bit_idx = _bit_idx, \
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.flags = _gate_flags, \
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.lock = _lock, \
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}; \
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DEFINE_CLK(_name, clk_gate_ops, _flags, \
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_name##_parent_names, _name##_parents);
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#define _DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \
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_flags, _reg, _shift, _width, \
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_divider_flags, _table, _lock) \
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static struct clk _name; \
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static const char *_name##_parent_names[] = { \
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_parent_name, \
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}; \
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static struct clk *_name##_parents[] = { \
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_parent_ptr, \
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}; \
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static struct clk_divider _name##_hw = { \
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.hw = { \
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.clk = &_name, \
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}, \
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.reg = _reg, \
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.shift = _shift, \
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.width = _width, \
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.flags = _divider_flags, \
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.table = _table, \
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.lock = _lock, \
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}; \
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DEFINE_CLK(_name, clk_divider_ops, _flags, \
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_name##_parent_names, _name##_parents);
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#define DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \
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_flags, _reg, _shift, _width, \
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_divider_flags, _lock) \
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_DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \
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_flags, _reg, _shift, _width, \
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_divider_flags, NULL, _lock)
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#define DEFINE_CLK_DIVIDER_TABLE(_name, _parent_name, \
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_parent_ptr, _flags, _reg, \
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_shift, _width, _divider_flags, \
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_table, _lock) \
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_DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \
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_flags, _reg, _shift, _width, \
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_divider_flags, _table, _lock) \
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#define DEFINE_CLK_MUX(_name, _parent_names, _parents, _flags, \
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_reg, _shift, _width, \
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_mux_flags, _lock) \
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static struct clk _name; \
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static struct clk_mux _name##_hw = { \
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.hw = { \
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.clk = &_name, \
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}, \
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.reg = _reg, \
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.shift = _shift, \
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.width = _width, \
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.flags = _mux_flags, \
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.lock = _lock, \
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}; \
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DEFINE_CLK(_name, clk_mux_ops, _flags, _parent_names, \
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_parents);
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#define DEFINE_CLK_FIXED_FACTOR(_name, _parent_name, \
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_parent_ptr, _flags, \
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_mult, _div) \
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static struct clk _name; \
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static const char *_name##_parent_names[] = { \
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_parent_name, \
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}; \
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static struct clk *_name##_parents[] = { \
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_parent_ptr, \
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}; \
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static struct clk_fixed_factor _name##_hw = { \
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.hw = { \
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.clk = &_name, \
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}, \
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.mult = _mult, \
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.div = _div, \
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}; \
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DEFINE_CLK(_name, clk_fixed_factor_ops, _flags, \
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_name##_parent_names, _name##_parents);
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/**
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* __clk_init - initialize the data structures in a struct clk
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* @dev: device initializing this clk, placeholder for now
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* @clk: clk being initialized
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*
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* Initializes the lists in struct clk, queries the hardware for the
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* parent and rate and sets them both.
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*
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* Any struct clk passed into __clk_init must have the following members
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* populated:
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* .name
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* .ops
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* .hw
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* .parent_names
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* .num_parents
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* .flags
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*
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* It is not necessary to call clk_register if __clk_init is used directly with
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* statically initialized clock data.
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*
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* Returns 0 on success, otherwise an error code.
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*/
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int __clk_init(struct device *dev, struct clk *clk);
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struct clk *__clk_register(struct device *dev, struct clk_hw *hw);
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#endif /* CONFIG_COMMON_CLK */
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#endif /* CLK_PRIVATE_H */
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