mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 06:05:15 +07:00
5e120f6e4b
Now have a somewhat simpler semaphore sync implementation for nv17:nv84, and a switched to using semaphores as fences on nv84+ and making use of the hardware's >= acquire operation. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
148 lines
3.7 KiB
C
148 lines
3.7 KiB
C
/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "drmP.h"
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#include "nouveau_drv.h"
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#include "nouveau_ramht.h"
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#include "nouveau_fence.h"
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#include "nouveau_software.h"
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#include "nouveau_hw.h"
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struct nv04_software_priv {
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struct nouveau_software_priv base;
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};
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struct nv04_software_chan {
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struct nouveau_software_chan base;
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};
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static int
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mthd_flip(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data)
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{
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struct nouveau_page_flip_state state;
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if (!nouveau_finish_page_flip(chan, &state)) {
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nv_set_crtc_base(chan->dev, state.crtc, state.offset +
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state.y * state.pitch +
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state.x * state.bpp / 8);
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}
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return 0;
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}
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static int
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nv04_software_context_new(struct nouveau_channel *chan, int engine)
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{
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struct nv04_software_chan *pch;
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pch = kzalloc(sizeof(*pch), GFP_KERNEL);
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if (!pch)
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return -ENOMEM;
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nouveau_software_context_new(&pch->base);
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chan->engctx[engine] = pch;
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return 0;
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}
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static void
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nv04_software_context_del(struct nouveau_channel *chan, int engine)
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{
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struct nv04_software_chan *pch = chan->engctx[engine];
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chan->engctx[engine] = NULL;
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kfree(pch);
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}
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static int
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nv04_software_object_new(struct nouveau_channel *chan, int engine,
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u32 handle, u16 class)
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{
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struct drm_device *dev = chan->dev;
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struct nouveau_gpuobj *obj = NULL;
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int ret;
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ret = nouveau_gpuobj_new(dev, chan, 16, 16, 0, &obj);
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if (ret)
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return ret;
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obj->engine = 0;
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obj->class = class;
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ret = nouveau_ramht_insert(chan, handle, obj);
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nouveau_gpuobj_ref(NULL, &obj);
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return ret;
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}
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static int
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nv04_software_init(struct drm_device *dev, int engine)
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{
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return 0;
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}
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static int
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nv04_software_fini(struct drm_device *dev, int engine, bool suspend)
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{
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return 0;
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}
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static void
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nv04_software_destroy(struct drm_device *dev, int engine)
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{
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struct nv04_software_priv *psw = nv_engine(dev, engine);
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NVOBJ_ENGINE_DEL(dev, SW);
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kfree(psw);
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}
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int
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nv04_software_create(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nv04_software_priv *psw;
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psw = kzalloc(sizeof(*psw), GFP_KERNEL);
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if (!psw)
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return -ENOMEM;
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psw->base.base.destroy = nv04_software_destroy;
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psw->base.base.init = nv04_software_init;
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psw->base.base.fini = nv04_software_fini;
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psw->base.base.context_new = nv04_software_context_new;
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psw->base.base.context_del = nv04_software_context_del;
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psw->base.base.object_new = nv04_software_object_new;
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nouveau_software_create(&psw->base);
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NVOBJ_ENGINE_ADD(dev, SW, &psw->base.base);
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if (dev_priv->card_type <= NV_04) {
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NVOBJ_CLASS(dev, 0x006e, SW);
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NVOBJ_MTHD (dev, 0x006e, 0x0150, nv04_fence_mthd);
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NVOBJ_MTHD (dev, 0x006e, 0x0500, mthd_flip);
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} else {
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NVOBJ_CLASS(dev, 0x016e, SW);
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NVOBJ_MTHD (dev, 0x016e, 0x0500, mthd_flip);
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}
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return 0;
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}
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