mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 15:49:17 +07:00
0fbb114af7
Used on nv17-nv28, they contain memory clocks and timings, only one of the table entries can actually be used, depending on the RAMCFG straps, and it's usually higher than the frequency programmed on boot by the BIOS. The memory timings listed in table version 0x1x are used to init the 0x12xx range but they aren't required for reclocking to work. Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
199 lines
5.1 KiB
C
199 lines
5.1 KiB
C
/*
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* Copyright 2010 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "drmP.h"
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#include "nouveau_drv.h"
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#include "nouveau_pm.h"
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static void
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legacy_perf_init(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nvbios *bios = &dev_priv->vbios;
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struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
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char *perf, *entry, *bmp = &bios->data[bios->offset];
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int headerlen, use_straps;
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if (bmp[5] < 0x5 || bmp[6] < 0x14) {
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NV_DEBUG(dev, "BMP version too old for perf\n");
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return;
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}
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perf = ROMPTR(bios, bmp[0x73]);
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if (!perf) {
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NV_DEBUG(dev, "No memclock table pointer found.\n");
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return;
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}
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switch (perf[0]) {
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case 0x12:
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case 0x14:
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case 0x18:
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use_straps = 0;
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headerlen = 1;
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break;
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case 0x01:
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use_straps = perf[1] & 1;
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headerlen = (use_straps ? 8 : 2);
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break;
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default:
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NV_WARN(dev, "Unknown memclock table version %x.\n", perf[0]);
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return;
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}
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entry = perf + headerlen;
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if (use_straps)
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entry += (nv_rd32(dev, NV_PEXTDEV_BOOT_0) & 0x3c) >> 1;
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sprintf(pm->perflvl[0].name, "performance_level_0");
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pm->perflvl[0].memory = ROM16(entry[0]) * 20;
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pm->nr_perflvl = 1;
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}
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void
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nouveau_perf_init(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
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struct nvbios *bios = &dev_priv->vbios;
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struct bit_entry P;
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u8 version, headerlen, recordlen, entries;
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u8 *perf, *entry;
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int vid, i;
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if (bios->type == NVBIOS_BIT) {
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if (bit_table(dev, 'P', &P))
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return;
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if (P.version != 1 && P.version != 2) {
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NV_WARN(dev, "unknown perf for BIT P %d\n", P.version);
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return;
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}
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perf = ROMPTR(bios, P.data[0]);
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version = perf[0];
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headerlen = perf[1];
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if (version < 0x40) {
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recordlen = perf[3] + (perf[4] * perf[5]);
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entries = perf[2];
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} else {
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recordlen = perf[2] + (perf[3] * perf[4]);
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entries = perf[5];
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}
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} else {
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if (bios->data[bios->offset + 6] < 0x27) {
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legacy_perf_init(dev);
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return;
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}
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perf = ROMPTR(bios, bios->data[bios->offset + 0x94]);
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if (!perf) {
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NV_DEBUG(dev, "perf table pointer invalid\n");
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return;
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}
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version = perf[1];
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headerlen = perf[0];
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recordlen = perf[3];
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entries = perf[2];
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}
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entry = perf + headerlen;
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for (i = 0; i < entries; i++) {
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struct nouveau_pm_level *perflvl = &pm->perflvl[pm->nr_perflvl];
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if (entry[0] == 0xff) {
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entry += recordlen;
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continue;
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}
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switch (version) {
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case 0x12:
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case 0x13:
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case 0x15:
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perflvl->fanspeed = entry[55];
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perflvl->voltage = entry[56];
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perflvl->core = ROM32(entry[1]) * 10;
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perflvl->memory = ROM32(entry[5]) * 10;
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break;
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case 0x21:
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case 0x23:
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case 0x24:
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perflvl->fanspeed = entry[4];
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perflvl->voltage = entry[5];
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perflvl->core = ROM16(entry[6]) * 1000;
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perflvl->memory = ROM16(entry[11]) * 1000;
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break;
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case 0x25:
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perflvl->fanspeed = entry[4];
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perflvl->voltage = entry[5];
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perflvl->core = ROM16(entry[6]) * 1000;
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perflvl->shader = ROM16(entry[10]) * 1000;
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perflvl->memory = ROM16(entry[12]) * 1000;
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break;
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case 0x30:
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case 0x35:
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perflvl->fanspeed = entry[6];
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perflvl->voltage = entry[7];
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perflvl->core = ROM16(entry[8]) * 1000;
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perflvl->shader = ROM16(entry[10]) * 1000;
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perflvl->memory = ROM16(entry[12]) * 1000;
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/*XXX: confirm on 0x35 */
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perflvl->unk05 = ROM16(entry[16]) * 1000;
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break;
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case 0x40:
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#define subent(n) entry[perf[2] + ((n) * perf[3])]
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perflvl->fanspeed = 0; /*XXX*/
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perflvl->voltage = 0; /*XXX: entry[2] */;
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perflvl->core = (ROM16(subent(0)) & 0xfff) * 1000;
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perflvl->shader = (ROM16(subent(1)) & 0xfff) * 1000;
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perflvl->memory = (ROM16(subent(2)) & 0xfff) * 1000;
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break;
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}
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/* make sure vid is valid */
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if (pm->voltage.supported && perflvl->voltage) {
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vid = nouveau_volt_vid_lookup(dev, perflvl->voltage);
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if (vid < 0) {
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NV_DEBUG(dev, "drop perflvl %d, bad vid\n", i);
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entry += recordlen;
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continue;
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}
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}
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snprintf(perflvl->name, sizeof(perflvl->name),
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"performance_level_%d", i);
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perflvl->id = i;
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pm->nr_perflvl++;
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entry += recordlen;
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}
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}
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void
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nouveau_perf_fini(struct drm_device *dev)
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{
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}
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