mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-25 14:43:46 +07:00
70a92003de
Currently the DTS defines two partitions at the same addresses, if you use one, you will corrupt information on the other one. Fix it by shifting the second partition. Signed-off-by: Pavel Machek <pavel@denx.de> [mpe: Reconstruct change log from email thread] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
413 lines
10 KiB
Plaintext
413 lines
10 KiB
Plaintext
/*
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* Device Tree Source for AMCC Sequoia
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*
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* Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
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* Copyright (c) 2006, 2007 IBM Corp.
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*
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* FIXME: Draft only!
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without
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* any warranty of any kind, whether express or implied.
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*
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*/
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/dts-v1/;
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/ {
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#address-cells = <2>;
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#size-cells = <1>;
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model = "amcc,sequoia";
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compatible = "amcc,sequoia";
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dcr-parent = <&{/cpus/cpu@0}>;
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aliases {
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ethernet0 = &EMAC0;
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ethernet1 = &EMAC1;
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serial0 = &UART0;
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serial1 = &UART1;
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serial2 = &UART2;
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serial3 = &UART3;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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model = "PowerPC,440EPx";
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reg = <0x00000000>;
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clock-frequency = <0>; /* Filled in by zImage */
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timebase-frequency = <0>; /* Filled in by zImage */
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i-cache-line-size = <32>;
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d-cache-line-size = <32>;
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i-cache-size = <32768>;
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d-cache-size = <32768>;
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dcr-controller;
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dcr-access-method = "native";
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};
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
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};
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UIC0: interrupt-controller0 {
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compatible = "ibm,uic-440epx","ibm,uic";
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interrupt-controller;
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cell-index = <0>;
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dcr-reg = <0x0c0 0x009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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};
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UIC1: interrupt-controller1 {
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compatible = "ibm,uic-440epx","ibm,uic";
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interrupt-controller;
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cell-index = <1>;
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dcr-reg = <0x0d0 0x009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
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interrupt-parent = <&UIC0>;
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};
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UIC2: interrupt-controller2 {
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compatible = "ibm,uic-440epx","ibm,uic";
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interrupt-controller;
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cell-index = <2>;
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dcr-reg = <0x0e0 0x009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
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interrupt-parent = <&UIC0>;
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};
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SDR0: sdr {
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compatible = "ibm,sdr-440epx", "ibm,sdr-440ep";
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dcr-reg = <0x00e 0x002>;
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};
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CPR0: cpr {
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compatible = "ibm,cpr-440epx", "ibm,cpr-440ep";
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dcr-reg = <0x00c 0x002>;
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};
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plb {
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compatible = "ibm,plb-440epx", "ibm,plb4";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges;
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clock-frequency = <0>; /* Filled in by zImage */
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SDRAM0: sdram {
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compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali";
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dcr-reg = <0x010 0x002>;
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};
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CRYPTO: crypto@e0100000 {
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compatible = "amcc,ppc440epx-crypto","amcc,ppc4xx-crypto";
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reg = <0 0xE0100000 0x80400>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x17 0x4>;
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};
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rng@e0120000 {
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compatible = "amcc,ppc440epx-rng","amcc,ppc4xx-rng";
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reg = <0 0xE0120000 0x150>;
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};
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DMA0: dma {
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compatible = "ibm,dma-440epx", "ibm,dma-4xx";
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dcr-reg = <0x100 0x027>;
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};
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MAL0: mcmal {
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compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
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dcr-reg = <0x180 0x062>;
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num-tx-chans = <2>;
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num-rx-chans = <2>;
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interrupt-parent = <&MAL0>;
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interrupts = <0x0 0x1 0x2 0x3 0x4>;
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
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/*RXEOB*/ 0x1 &UIC0 0xb 0x4
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/*SERR*/ 0x2 &UIC1 0x0 0x4
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/*TXDE*/ 0x3 &UIC1 0x1 0x4
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/*RXDE*/ 0x4 &UIC1 0x2 0x4>;
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interrupt-map-mask = <0xffffffff>;
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};
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USB1: usb@e0000400 {
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compatible = "ibm,usb-ohci-440epx", "ohci-be";
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reg = <0x00000000 0xe0000400 0x00000060>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x15 0x8>;
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};
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USB0: ehci@e0000300 {
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compatible = "ibm,usb-ehci-440epx", "usb-ehci";
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interrupt-parent = <&UIC0>;
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interrupts = <0x1a 0x4>;
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reg = <0x00000000 0xe0000300 0x00000090 0x00000000 0xe0000390 0x00000070>;
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big-endian;
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};
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POB0: opb {
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compatible = "ibm,opb-440epx", "ibm,opb";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00000000 0x00000001 0x00000000 0x80000000
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0x80000000 0x00000001 0x80000000 0x80000000>;
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interrupt-parent = <&UIC1>;
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interrupts = <0x7 0x4>;
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clock-frequency = <0>; /* Filled in by zImage */
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EBC0: ebc {
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compatible = "ibm,ebc-440epx", "ibm,ebc";
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dcr-reg = <0x012 0x002>;
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#address-cells = <2>;
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#size-cells = <1>;
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clock-frequency = <0>; /* Filled in by zImage */
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interrupts = <0x5 0x1>;
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interrupt-parent = <&UIC1>;
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nor_flash@0,0 {
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compatible = "amd,s29gl256n", "cfi-flash";
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bank-width = <2>;
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reg = <0x00000000 0x00000000 0x04000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "Kernel";
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reg = <0x00000000 0x00180000>;
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};
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partition@180000 {
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label = "ramdisk";
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reg = <0x00180000 0x00200000>;
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};
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partition@380000 {
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label = "file system";
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reg = <0x00380000 0x03aa0000>;
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};
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partition@3e20000 {
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label = "kozio";
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reg = <0x03e20000 0x00140000>;
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};
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partition@3f60000 {
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label = "env";
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reg = <0x03f60000 0x00040000>;
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};
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partition@3fa0000 {
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label = "u-boot";
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reg = <0x03fa0000 0x00060000>;
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};
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};
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ndfc@3,0 {
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compatible = "ibm,ndfc";
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reg = <0x00000003 0x00000000 0x00002000>;
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ccr = <0x00001000>;
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bank-settings = <0x80002222>;
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#address-cells = <1>;
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#size-cells = <1>;
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nand {
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x00000000 0x00084000>;
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};
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partition@84000 {
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label = "user";
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reg = <0x00084000 0x01f7c000>;
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};
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};
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};
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};
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UART0: serial@ef600300 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <0xef600300 0x00000008>;
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virtual-reg = <0xef600300>;
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clock-frequency = <0>; /* Filled in by zImage */
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current-speed = <115200>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x0 0x4>;
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};
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UART1: serial@ef600400 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <0xef600400 0x00000008>;
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virtual-reg = <0xef600400>;
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clock-frequency = <0>;
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current-speed = <0>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x1 0x4>;
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};
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UART2: serial@ef600500 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <0xef600500 0x00000008>;
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virtual-reg = <0xef600500>;
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clock-frequency = <0>;
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current-speed = <0>;
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interrupt-parent = <&UIC1>;
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interrupts = <0x3 0x4>;
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};
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UART3: serial@ef600600 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <0xef600600 0x00000008>;
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virtual-reg = <0xef600600>;
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clock-frequency = <0>;
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current-speed = <0>;
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interrupt-parent = <&UIC1>;
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interrupts = <0x4 0x4>;
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};
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IIC0: i2c@ef600700 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "ibm,iic-440epx", "ibm,iic";
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reg = <0xef600700 0x00000014>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x2 0x4>;
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hwmon@48 {
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compatible = "adi,ad7414";
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reg = <0x48>;
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};
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};
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IIC1: i2c@ef600800 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "ibm,iic-440epx", "ibm,iic";
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reg = <0xef600800 0x00000014>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x7 0x4>;
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};
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ZMII0: emac-zmii@ef600d00 {
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compatible = "ibm,zmii-440epx", "ibm,zmii";
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reg = <0xef600d00 0x0000000c>;
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};
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RGMII0: emac-rgmii@ef601000 {
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compatible = "ibm,rgmii-440epx", "ibm,rgmii";
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reg = <0xef601000 0x00000008>;
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has-mdio;
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};
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EMAC0: ethernet@ef600e00 {
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device_type = "network";
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compatible = "ibm,emac-440epx", "ibm,emac4";
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interrupt-parent = <&EMAC0>;
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interrupts = <0x0 0x1>;
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
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/*Wake*/ 0x1 &UIC1 0x1d 0x4>;
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reg = <0xef600e00 0x00000074>;
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local-mac-address = [000000000000];
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mal-device = <&MAL0>;
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mal-tx-channel = <0>;
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mal-rx-channel = <0>;
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cell-index = <0>;
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max-frame-size = <9000>;
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rx-fifo-size = <4096>;
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tx-fifo-size = <2048>;
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phy-mode = "rgmii";
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phy-map = <0x00000000>;
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zmii-device = <&ZMII0>;
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zmii-channel = <0>;
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rgmii-device = <&RGMII0>;
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rgmii-channel = <0>;
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has-inverted-stacr-oc;
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has-new-stacr-staopc;
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};
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EMAC1: ethernet@ef600f00 {
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device_type = "network";
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compatible = "ibm,emac-440epx", "ibm,emac4";
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interrupt-parent = <&EMAC1>;
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interrupts = <0x0 0x1>;
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
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/*Wake*/ 0x1 &UIC1 0x1f 0x4>;
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reg = <0xef600f00 0x00000074>;
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local-mac-address = [000000000000];
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mal-device = <&MAL0>;
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mal-tx-channel = <1>;
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mal-rx-channel = <1>;
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cell-index = <1>;
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max-frame-size = <9000>;
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rx-fifo-size = <4096>;
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tx-fifo-size = <2048>;
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phy-mode = "rgmii";
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phy-map = <0x00000000>;
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zmii-device = <&ZMII0>;
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zmii-channel = <1>;
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rgmii-device = <&RGMII0>;
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rgmii-channel = <1>;
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has-inverted-stacr-oc;
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has-new-stacr-staopc;
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};
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};
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PCI0: pci@1ec000000 {
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device_type = "pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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compatible = "ibm,plb440epx-pci", "ibm,plb-pci";
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primary;
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reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */
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0x00000001 0xeed00000 0x00000004 /* IACK */
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0x00000001 0xeed00000 0x00000004 /* Special cycle */
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0x00000001 0xef400000 0x00000040>; /* Internal registers */
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/* Outbound ranges, one memory and one IO,
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* later cannot be changed. Chip supports a second
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* IO range but we don't use it for now
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* From the 440EPx user manual:
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* PCI 1 Memory 1 8000 0000 1 BFFF FFFF 1GB
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* I/O 1 E800 0000 1 E800 FFFF 64KB
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* I/O 1 E880 0000 1 EBFF FFFF 56MB
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*/
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ranges = <0x02000000 0x00000000 0x80000000 0x00000001 0x80000000 0x00000000 0x40000000
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0x01000000 0x00000000 0x00000000 0x00000001 0xe8000000 0x00000000 0x00010000
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0x01000000 0x00000000 0x00000000 0x00000001 0xe8800000 0x00000000 0x03800000>;
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/* Inbound 2GB range starting at 0 */
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dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
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/* All PCI interrupts are routed to IRQ 67 */
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interrupt-map-mask = <0x0 0x0 0x0 0x0>;
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interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >;
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};
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};
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chosen {
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linux,stdout-path = "/plb/opb/serial@ef600300";
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bootargs = "console=ttyS0,115200";
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};
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};
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