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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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e126ba97db
The driver is comprised of two kernel modules: mlx5_ib and mlx5_core. This partitioning resembles what we have for mlx4, except that mlx5_ib is the pci device driver and not mlx5_core. mlx5_core is essentially a library that provides general functionality that is intended to be used by other Mellanox devices that will be introduced in the future. mlx5_ib has a similar role as any hardware device under drivers/infiniband/hw. Signed-off-by: Eli Cohen <eli@mellanox.com> Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> [ Merge in coccinelle fixes from Fengguang Wu <fengguang.wu@intel.com>. - Roland ] Signed-off-by: Roland Dreier <roland@purestorage.com>
93 lines
2.9 KiB
C
93 lines
2.9 KiB
C
/*
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* Copyright (c) 2013, Mellanox Technologies inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "mlx5_ib.h"
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struct ib_ah *create_ib_ah(struct ib_ah_attr *ah_attr,
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struct mlx5_ib_ah *ah)
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{
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if (ah_attr->ah_flags & IB_AH_GRH) {
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memcpy(ah->av.rgid, &ah_attr->grh.dgid, 16);
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ah->av.grh_gid_fl = cpu_to_be32(ah_attr->grh.flow_label |
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(1 << 30) |
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ah_attr->grh.sgid_index << 20);
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ah->av.hop_limit = ah_attr->grh.hop_limit;
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ah->av.tclass = ah_attr->grh.traffic_class;
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}
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ah->av.rlid = cpu_to_be16(ah_attr->dlid);
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ah->av.fl_mlid = ah_attr->src_path_bits & 0x7f;
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ah->av.stat_rate_sl = (ah_attr->static_rate << 4) | (ah_attr->sl & 0xf);
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return &ah->ibah;
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}
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struct ib_ah *mlx5_ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr)
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{
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struct mlx5_ib_ah *ah;
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ah = kzalloc(sizeof(*ah), GFP_ATOMIC);
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if (!ah)
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return ERR_PTR(-ENOMEM);
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return create_ib_ah(ah_attr, ah); /* never fails */
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}
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int mlx5_ib_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr)
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{
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struct mlx5_ib_ah *ah = to_mah(ibah);
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u32 tmp;
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memset(ah_attr, 0, sizeof(*ah_attr));
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tmp = be32_to_cpu(ah->av.grh_gid_fl);
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if (tmp & (1 << 30)) {
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ah_attr->ah_flags = IB_AH_GRH;
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ah_attr->grh.sgid_index = (tmp >> 20) & 0xff;
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ah_attr->grh.flow_label = tmp & 0xfffff;
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memcpy(&ah_attr->grh.dgid, ah->av.rgid, 16);
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ah_attr->grh.hop_limit = ah->av.hop_limit;
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ah_attr->grh.traffic_class = ah->av.tclass;
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}
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ah_attr->dlid = be16_to_cpu(ah->av.rlid);
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ah_attr->static_rate = ah->av.stat_rate_sl >> 4;
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ah_attr->sl = ah->av.stat_rate_sl & 0xf;
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return 0;
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}
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int mlx5_ib_destroy_ah(struct ib_ah *ah)
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{
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kfree(to_mah(ah));
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return 0;
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}
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