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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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9b710506a0
Change the bitops operation to be naturally "long", i.e. 63 bits on the 64-bit kernel. Additional bugs are likely to crop up in the future. We already have bugs which machines with > 16 TiB of memory in a single node, as can happen if memory is interleaved. The x86 bitop operations take a signed index, so using an unsigned type is not an option. Jim Kukunas measured the effect of this patch on kernel size: it adds 2779 bytes to the allyesconfig kernel. Some of that probably could be elided by replacing the inline functions with macros which select the 32-bit type if the index is a 32-bit value, something like: In that case we could also use "Jr" constraints for the 64-bit version. However, this would more than double the amount of code for a relatively small gain. Note that we can't use ilog2() for _BITOPS_LONG_SHIFT, as that causes a recursive header inclusion problem. The change to constant_test_bit() should both generate better code and give correct result for negative bit indicies. As previously written the compiler had to generate extra code to create the proper wrong result for negative values. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Cc: Jim Kukunas <james.t.kukunas@intel.com> Link: http://lkml.kernel.org/n/tip-z61ofiwe90xeyb461o72h8ya@git.kernel.org
131 lines
3.4 KiB
C
131 lines
3.4 KiB
C
#ifndef _ASM_X86_SYNC_BITOPS_H
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#define _ASM_X86_SYNC_BITOPS_H
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/*
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* Copyright 1992, Linus Torvalds.
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*/
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/*
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* These have to be done with inline assembly: that way the bit-setting
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* is guaranteed to be atomic. All bit operations return 0 if the bit
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* was cleared before the operation and != 0 if it was not.
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*
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* bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
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*/
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#define ADDR (*(volatile long *)addr)
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/**
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* sync_set_bit - Atomically set a bit in memory
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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* This function is atomic and may not be reordered. See __set_bit()
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* if you do not require the atomic guarantees.
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*
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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*/
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static inline void sync_set_bit(long nr, volatile unsigned long *addr)
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{
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asm volatile("lock; bts %1,%0"
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: "+m" (ADDR)
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: "Ir" (nr)
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: "memory");
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}
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/**
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* sync_clear_bit - Clears a bit in memory
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* @nr: Bit to clear
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* @addr: Address to start counting from
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*
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* sync_clear_bit() is atomic and may not be reordered. However, it does
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* not contain a memory barrier, so if it is used for locking purposes,
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* you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
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* in order to ensure changes are visible on other processors.
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*/
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static inline void sync_clear_bit(long nr, volatile unsigned long *addr)
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{
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asm volatile("lock; btr %1,%0"
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: "+m" (ADDR)
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: "Ir" (nr)
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: "memory");
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}
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/**
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* sync_change_bit - Toggle a bit in memory
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* @nr: Bit to change
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* @addr: Address to start counting from
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*
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* sync_change_bit() is atomic and may not be reordered.
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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*/
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static inline void sync_change_bit(long nr, volatile unsigned long *addr)
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{
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asm volatile("lock; btc %1,%0"
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: "+m" (ADDR)
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: "Ir" (nr)
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: "memory");
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}
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/**
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* sync_test_and_set_bit - Set a bit and return its old value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is atomic and cannot be reordered.
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* It also implies a memory barrier.
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*/
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static inline int sync_test_and_set_bit(long nr, volatile unsigned long *addr)
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{
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int oldbit;
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asm volatile("lock; bts %2,%1\n\tsbbl %0,%0"
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: "=r" (oldbit), "+m" (ADDR)
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: "Ir" (nr) : "memory");
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return oldbit;
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}
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/**
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* sync_test_and_clear_bit - Clear a bit and return its old value
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* @nr: Bit to clear
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* @addr: Address to count from
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*
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* This operation is atomic and cannot be reordered.
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* It also implies a memory barrier.
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*/
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static inline int sync_test_and_clear_bit(long nr, volatile unsigned long *addr)
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{
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int oldbit;
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asm volatile("lock; btr %2,%1\n\tsbbl %0,%0"
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: "=r" (oldbit), "+m" (ADDR)
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: "Ir" (nr) : "memory");
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return oldbit;
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}
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/**
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* sync_test_and_change_bit - Change a bit and return its old value
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* @nr: Bit to change
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* @addr: Address to count from
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*
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* This operation is atomic and cannot be reordered.
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* It also implies a memory barrier.
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*/
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static inline int sync_test_and_change_bit(long nr, volatile unsigned long *addr)
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{
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int oldbit;
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asm volatile("lock; btc %2,%1\n\tsbbl %0,%0"
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: "=r" (oldbit), "+m" (ADDR)
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: "Ir" (nr) : "memory");
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return oldbit;
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}
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#define sync_test_bit(nr, addr) test_bit(nr, addr)
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#undef ADDR
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#endif /* _ASM_X86_SYNC_BITOPS_H */
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