Stafford Horne 9b54470afd irqchip: add initial support for ompic ... IPI driver for the Open Multi-Processor Interrupt Controller (ompic) as described in the Multi-core support section of the OpenRISC 1.2 architecture specification: https://github.com/openrisc/doc/raw/master/openrisc-arch-1.2-rev0.pdf Each OpenRISC core contains a full interrupt controller which is used in the SMP architecture for interrupt balancing. This IPI device, the ompic, is the only external device required for enabling SMP on OpenRISC. Pending ops are stored in a memory bit mask which can allow multiple pending operations to be set and serviced at a time. This is mostly borrowed from the alpha IPI implementation. Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> [shorne@gmail.com: converted ops to bitmask, wrote commit message] Signed-off-by: Stafford Horne <shorne@gmail.com>		2017-11-03 14:01:13 +09:00
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bindings	irqchip: add initial support for ompic	2017-11-03 14:01:13 +09:00
00-INDEX
booting-without-of.txt	dt-bindings: update OpenFirmware document links to devicetree.org	2017-08-01 12:24:07 -05:00
changesets.txt
dynamic-resolution-notes.txt
of_unittest.txt
overlay-notes.txt	Documentation: remove overlay-notes reference to non-existent file	2017-06-22 11:14:01 -05:00
todo.txt
usage-model.txt	of: update ePAPR references to point to Devicetree Specification	2017-06-22 11:22:06 -05:00