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When booting fewer cores than are physically present on a versatile platform (e.g. when passing maxcpus=N on the command line), some secondary cores may remain in the holding pen, which is marked __INIT, as each CPU's gic cpumask is initialised to 0xff, and thus an IPI to any CPU will wake up *all* secondaries. This behaviour is crucial to the GIC cpumask self-discovery. Late in the boot process, the memory comprising the holding pen will be released to the kernel for more general use, and may be overwritten with arbitrary data, which can cause the held secondaries to start behaving unpredictably. This can lead to all manner of odd behaviour from the kernel. As preventing cpus from entering the pen would require invasive changes to the GIC driver and to existing dts used in the wild, we instead remove the __INIT marker from the pen, keeping it around and leaving the unused secondary CPUs dormant. Link: http://lists.infradead.org/pipermail/linux-arm-kernel/2013-June/175039.html Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
40 lines
957 B
ArmAsm
40 lines
957 B
ArmAsm
/*
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* linux/arch/arm/plat-versatile/headsmp.S
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*
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* Copyright (c) 2003 ARM Limited
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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/*
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* Realview/Versatile Express specific entry point for secondary CPUs.
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* This provides a "holding pen" into which all secondary cores are held
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* until we're ready for them to initialise.
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*/
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ENTRY(versatile_secondary_startup)
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mrc p15, 0, r0, c0, c0, 5
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bic r0, #0xff000000
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adr r4, 1f
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ldmia r4, {r5, r6}
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sub r4, r4, r5
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add r6, r6, r4
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pen: ldr r7, [r6]
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cmp r7, r0
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bne pen
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/*
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* we've been released from the holding pen: secondary_stack
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* should now contain the SVC stack for this core
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*/
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b secondary_startup
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.align
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1: .long .
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.long pen_release
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ENDPROC(versatile_secondary_startup)
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