mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 05:17:28 +07:00
a5ebba6b54
These are various power management related changes, mainly concerning
cpuidle on i.MX and OMAP, as well as a the move of the omap smartreflex
driver to live in the power subsystem.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIVAwUAUA2dhWCrR//JCVInAQLuqRAA1FxxzAMTESs3/rpjnQmZUUKef4SuJwY2
GBenXFLY5PlxgcrwTbKwepapu8IWfmw171+tRrrMWvQgtBwa+SefwFCaLcRkvRrs
kNAHIVI+Gqm4/m6d+WC+ymJLOZdkcTHES+40eycxcjiIElGEMtiW5/qwh060GAgC
YxtjoN9BKegjsDLPZdZghO855YUV8CKEg+q5kIYW0Q3Ci0POGvOhgvbI61K5w8z7
fTdbFRDRBqy0BEx9noKTu8XIB/inwlyUY7N3bAv494TsU48kxMIb95FdSGiY/0yV
1883wCacBYBNemWRvWBHNilSsDcuDmM3yNvdwi3JvQnzFBPc8uyze9wbPFOW4aQd
Vhf+g8hjuHkw1xreWpO+nREysOjiiSzRUci2nT6aAQTcpWCacVTJ5sW7KOQ63nrH
OQpe/fvm/qT8FKPDh/lcrqIUKrHfeFjZx7XlYjw7j0ZL+99mIpwuOql18mQee9G5
OV6c0rfgeTnGLdc1kOlLPElkXe7SQ/GJK1JI1mA5BNYJlVKx+o0qVlcnRzY6bWaP
dmSIA+9Bs/fglvmAQHT3u68zn5KfoTbnJWb0v5PQJfitEBdlugKG8nF9mVRIX70X
EygOta8vApF9N20WhE2TLLaDhlrOmd4bOtRVdoO8pDVN/hsWIylnEu952ZBSZg3U
9wF0Ydy2LP4=
=tgT5
-----END PGP SIGNATURE-----
Merge tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc power management changes from Arnd Bergmann:
"These are various power management related changes, mainly concerning
cpuidle on i.MX and OMAP, as well as a the move of the omap
smartreflex driver to live in the power subsystem."
Fix up conflicts in arch/arm/mach-{imx/mach-imx6q.c,omap2/prm2xxx_3xxx.h}
* tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (37 commits)
ARM: OMAP2+: PM: fix IRQ_NOAUTOEN removal by mis-merge
ARM: OMAP2+: do not allow SmartReflex to be built as a module
ARM: OMAP2: Use hwmod to initialize mmc for 2420
ARM: OMAP3: PM: cpuidle: optimize the clkdm idle latency in C1 state
ARM: OMAP3: PM: cpuidle: optimize the PER latency in C1 state
ARM: OMAP3: PM: cpuidle: default to C1 in next_valid_state
ARM: OMAP3: PM: cleanup cam_pwrdm leftovers
ARM: OMAP3: PM: call pre/post transition per powerdomain
ARM: OMAP2+: powerdomain: allow pre/post transtion to be per pwrdm
ARM: OMAP3: PM: Remove IO Daisychain control from cpuidle
ARM: OMAP3PLUS: hwmod: reconfigure IO Daisychain during hwmod mux
ARM: OMAP3+: PRM: Enable IO wake up
ARM: OMAP4: PRM: Add IO Daisychain support
ARM: OMAP3: PM: Move IO Daisychain function to omap3 prm file
ARM: OMAP3: PM: correct enable/disable of daisy io chain
ARM: OMAP2+: PRM: fix compile for OMAP4-only build
W1: OMAP HDQ1W: use runtime PM
ARM: OMAP2+: HDQ1W: use omap_device
W1: OMAP HDQ1W: use 32-bit register accesses
W1: OMAP HDQ1W: allow driver to be built on all OMAP2+
...
132 lines
3.3 KiB
C
132 lines
3.3 KiB
C
/*
|
|
* OMAP2/3 Power Management Routines
|
|
*
|
|
* Copyright (C) 2008 Nokia Corporation
|
|
* Jouni Hogander
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
|
|
#define __ARCH_ARM_MACH_OMAP2_PM_H
|
|
|
|
#include <linux/err.h>
|
|
|
|
#include "powerdomain.h"
|
|
|
|
#ifdef CONFIG_CPU_IDLE
|
|
extern int __init omap3_idle_init(void);
|
|
extern int __init omap4_idle_init(void);
|
|
#else
|
|
static inline int omap3_idle_init(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static inline int omap4_idle_init(void)
|
|
{
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
extern void *omap3_secure_ram_storage;
|
|
extern void omap3_pm_off_mode_enable(int);
|
|
extern void omap_sram_idle(void);
|
|
extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
|
|
extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
|
|
extern int (*omap_pm_suspend)(void);
|
|
|
|
#if defined(CONFIG_PM_OPP)
|
|
extern int omap3_opp_init(void);
|
|
extern int omap4_opp_init(void);
|
|
#else
|
|
static inline int omap3_opp_init(void)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
static inline int omap4_opp_init(void)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
#endif
|
|
|
|
extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
|
|
extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
|
|
|
|
#ifdef CONFIG_PM_DEBUG
|
|
extern u32 enable_off_mode;
|
|
#else
|
|
#define enable_off_mode 0
|
|
#endif
|
|
|
|
#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
|
|
extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
|
|
#else
|
|
#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
|
|
#endif /* CONFIG_PM_DEBUG */
|
|
|
|
/* 24xx */
|
|
extern void omap24xx_idle_loop_suspend(void);
|
|
extern unsigned int omap24xx_idle_loop_suspend_sz;
|
|
|
|
extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
|
|
void __iomem *sdrc_power);
|
|
extern unsigned int omap24xx_cpu_suspend_sz;
|
|
|
|
/* 3xxx */
|
|
extern void omap34xx_cpu_suspend(int save_state);
|
|
|
|
/* omap3_do_wfi function pointer and size, for copy to SRAM */
|
|
extern void omap3_do_wfi(void);
|
|
extern unsigned int omap3_do_wfi_sz;
|
|
/* ... and its pointer from SRAM after copy */
|
|
extern void (*omap3_do_wfi_sram)(void);
|
|
|
|
/* save_secure_ram_context function pointer and size, for copy to SRAM */
|
|
extern int save_secure_ram_context(u32 *addr);
|
|
extern unsigned int save_secure_ram_context_sz;
|
|
|
|
extern void omap3_save_scratchpad_contents(void);
|
|
|
|
#define PM_RTA_ERRATUM_i608 (1 << 0)
|
|
#define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1)
|
|
|
|
#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
|
|
extern u16 pm34xx_errata;
|
|
#define IS_PM34XX_ERRATUM(id) (pm34xx_errata & (id))
|
|
extern void enable_omap3630_toggle_l2_on_restore(void);
|
|
#else
|
|
#define IS_PM34XX_ERRATUM(id) 0
|
|
static inline void enable_omap3630_toggle_l2_on_restore(void) { }
|
|
#endif /* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */
|
|
|
|
#ifdef CONFIG_POWER_AVS_OMAP
|
|
extern int omap_devinit_smartreflex(void);
|
|
extern void omap_enable_smartreflex_on_init(void);
|
|
#else
|
|
static inline int omap_devinit_smartreflex(void)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
static inline void omap_enable_smartreflex_on_init(void) {}
|
|
#endif
|
|
|
|
#ifdef CONFIG_TWL4030_CORE
|
|
extern int omap3_twl_init(void);
|
|
extern int omap4_twl_init(void);
|
|
extern int omap3_twl_set_sr_bit(bool enable);
|
|
#else
|
|
static inline int omap3_twl_init(void)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
static inline int omap4_twl_init(void)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
#endif
|
|
|
|
#endif
|