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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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0160a4b689
This patch moves all Armada 370/XP/38x/39x SPI controller nodes from the 'internal-regs' node down into the 'soc' node. This is in preparation to enable the usage of the SPI direct access mode. A follow-up patch will add the static MBus mappings for the SPI devices into the 'reg' property of the SPI controller DT node. By moving these SPI controller nodes, this patch also makes use of the labels rather than keeping the tree structure. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Mark Brown <broonie@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
179 lines
3.3 KiB
Plaintext
179 lines
3.3 KiB
Plaintext
/*
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* Device Tree common file for the Seagate Personal Cloud NAS 1 and 2-Bay
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* (Armada 370 SoC).
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*
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* Copyright (C) 2015 Seagate
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*
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* Author: Simon Guinot <simon.guinot@sequanux.org>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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/*
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* TODO: add support for the white SATA LED.
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*/
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#include "armada-370.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x20000000>; /* 512 MB */
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};
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soc {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
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MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
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pcie-controller {
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status = "okay";
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/* USB 3.0 Bridge ASM1042A */
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pcie@1,0 {
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status = "okay";
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};
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};
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internal-regs {
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coherency-fabric@20200 {
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broken-idle;
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};
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serial@12000 {
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status = "okay";
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};
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mdio {
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pinctrl-0 = <&mdio_pins>;
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pinctrl-names = "default";
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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ethernet@74000 {
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status = "okay";
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pinctrl-0 = <&ge1_rgmii_pins>;
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pinctrl-names = "default";
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phy = <&phy0>;
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phy-mode = "rgmii-id";
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};
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usb@50000 {
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status = "okay";
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};
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};
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "USB Power";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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gpio = <&gpio1 27 GPIO_ACTIVE_LOW>;
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};
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regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "SATA0 power";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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regulator-always-on;
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regulator-boot-on;
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gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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button@1 {
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label = "Power button";
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linux,code = <KEY_POWER>;
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gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
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debounce-interval = <100>;
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};
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button@2 {
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label = "Reset Button";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
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debounce-interval = <100>;
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};
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button@3 {
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label = "USB VBUS error";
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linux,code = <KEY_UNKNOWN>;
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gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
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debounce-interval = <100>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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red-sata0 {
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label = "cumulus:red:sata0";
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gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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gpio_poweroff {
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compatible = "gpio-poweroff";
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gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
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};
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};
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&pinctrl {
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pinctrl-0 = <&sata_led_pin>;
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pinctrl-names = "default";
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sata_led_pin: sata-led-pin {
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marvell,pins = "mpp60";
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marvell,function = "sata0";
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};
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gpio_led_pin: gpio-led-pin {
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marvell,pins = "mpp60";
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marvell,function = "gpio";
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};
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};
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&spi0 {
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status = "okay";
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pinctrl-0 = <&spi0_pins2>;
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pinctrl-names = "default";
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spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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/* MX25L8006E */
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compatible = "mxicy,mx25l8005", "jedec,spi-nor";
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reg = <0>; /* Chip select 0 */
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spi-max-frequency = <50000000>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x100000>;
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};
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};
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};
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