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68d8786102
This patch adds nds32 SoC(AE3XX and AG101P) binding documents. Signed-off-by: Greentime Hu <greentime@andestech.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
41 lines
1.4 KiB
Plaintext
41 lines
1.4 KiB
Plaintext
Andestech(nds32) AE3XX Platform
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-----------------------------------------------------------------------------
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The AE3XX prototype demonstrates the AE3XX example platform on the FPGA. It
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is composed of one Andestech(nds32) processor and AE3XX.
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Required properties (in root node):
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- compatible = "andestech,ae3xx";
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Example:
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/dts-v1/;
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/ {
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compatible = "andestech,ae3xx";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&intc>;
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};
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Andestech(nds32) AG101P Platform
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-----------------------------------------------------------------------------
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AG101P is a generic SoC Platform IP that works with any of Andestech(nds32)
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processors to provide a cost-effective and high performance solution for
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majority of embedded systems in variety of application domains. Users may
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simply attach their IP on one of the system buses together with certain glue
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logics to complete a SoC solution for a specific application. With
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comprehensive simulation and design environments, users may evaluate the
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system performance of their applications and track bugs of their designs
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efficiently. The optional hardware development platform further provides real
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system environment for early prototyping and software/hardware co-development.
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Required properties (in root node):
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compatible = "andestech,ag101p";
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Example:
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/dts-v1/;
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/ {
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compatible = "andestech,ag101p";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&intc>;
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};
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