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078a55fc82
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings. In any case, they are temporary and harmless.
Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
from asm files. MIPS is interesting in this respect, because there
are also uasm users hiding behind their own renamed versions of the
__cpuinit macros.
[1] https://lkml.org/lkml/2013/5/20/589
[ralf@linux-mips.org: Folded in Paul's followup fix.]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5494/
Patchwork: https://patchwork.linux-mips.org/patch/5495/
Patchwork: https://patchwork.linux-mips.org/patch/5509/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
105 lines
2.3 KiB
C
105 lines
2.3 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2013 Imagination Technologies Ltd.
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*/
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#include <linux/clockchips.h>
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#include <linux/interrupt.h>
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#include <linux/percpu.h>
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#include <linux/smp.h>
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#include <linux/irq.h>
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#include <asm/time.h>
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#include <asm/gic.h>
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#include <asm/mips-boards/maltaint.h>
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DEFINE_PER_CPU(struct clock_event_device, gic_clockevent_device);
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int gic_timer_irq_installed;
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static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
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{
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u64 cnt;
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int res;
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cnt = gic_read_count();
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cnt += (u64)delta;
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gic_write_compare(cnt);
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res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
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return res;
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}
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void gic_set_clock_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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{
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/* Nothing to do ... */
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}
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irqreturn_t gic_compare_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *cd;
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int cpu = smp_processor_id();
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gic_write_compare(gic_read_compare());
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cd = &per_cpu(gic_clockevent_device, cpu);
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cd->event_handler(cd);
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return IRQ_HANDLED;
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}
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struct irqaction gic_compare_irqaction = {
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.handler = gic_compare_interrupt,
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.flags = IRQF_PERCPU | IRQF_TIMER,
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.name = "timer",
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};
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void gic_event_handler(struct clock_event_device *dev)
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{
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}
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int gic_clockevent_init(void)
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{
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unsigned int cpu = smp_processor_id();
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struct clock_event_device *cd;
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unsigned int irq;
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if (!cpu_has_counter || !gic_frequency)
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return -ENXIO;
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irq = MIPS_GIC_IRQ_BASE;
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cd = &per_cpu(gic_clockevent_device, cpu);
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cd->name = "MIPS GIC";
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cd->features = CLOCK_EVT_FEAT_ONESHOT;
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clockevent_set_clock(cd, gic_frequency);
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/* Calculate the min / max delta */
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cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
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cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
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cd->rating = 300;
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cd->irq = irq;
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cd->cpumask = cpumask_of(cpu);
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cd->set_next_event = gic_next_event;
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cd->set_mode = gic_set_clock_mode;
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cd->event_handler = gic_event_handler;
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clockevents_register_device(cd);
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GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_COMPARE_MAP), 0x80000002);
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GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_SMASK), GIC_VPE_SMASK_CMP_MSK);
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if (gic_timer_irq_installed)
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return 0;
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gic_timer_irq_installed = 1;
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setup_irq(irq, &gic_compare_irqaction);
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irq_set_handler(irq, handle_percpu_irq);
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return 0;
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}
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