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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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4f9bbcefa1
When running in M-mode we can't use the SBI to set the timer, and don't have access to the time CSR as that usually is emulated by M-mode. Instead provide code that directly accesses the MMIO for the timer. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Anup Patel <anup@brainfault.org> Acked-by: Thomas Gleixner <tglx@linutronix.de> # for drivers/clocksource [paul.walmsley@sifive.com: updated to apply; fixed checkpatch issue; timex.h now includes asm/mmio.h to resolve header file problems] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
66 lines
1.3 KiB
C
66 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 Regents of the University of California
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*/
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#ifndef _ASM_RISCV_TIMEX_H
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#define _ASM_RISCV_TIMEX_H
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#include <asm/csr.h>
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#include <asm/mmio.h>
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typedef unsigned long cycles_t;
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extern u64 __iomem *riscv_time_val;
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extern u64 __iomem *riscv_time_cmp;
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#ifdef CONFIG_64BIT
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#define mmio_get_cycles() readq_relaxed(riscv_time_val)
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#else
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#define mmio_get_cycles() readl_relaxed(riscv_time_val)
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#define mmio_get_cycles_hi() readl_relaxed(((u32 *)riscv_time_val) + 1)
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#endif
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static inline cycles_t get_cycles(void)
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{
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if (IS_ENABLED(CONFIG_RISCV_SBI))
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return csr_read(CSR_TIME);
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return mmio_get_cycles();
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}
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#define get_cycles get_cycles
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#ifdef CONFIG_64BIT
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static inline u64 get_cycles64(void)
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{
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return get_cycles();
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}
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#else /* CONFIG_64BIT */
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static inline u32 get_cycles_hi(void)
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{
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if (IS_ENABLED(CONFIG_RISCV_SBI))
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return csr_read(CSR_TIMEH);
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return mmio_get_cycles_hi();
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}
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static inline u64 get_cycles64(void)
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{
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u32 hi, lo;
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do {
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hi = get_cycles_hi();
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lo = get_cycles();
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} while (hi != get_cycles_hi());
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return ((u64)hi << 32) | lo;
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}
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#endif /* CONFIG_64BIT */
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#define ARCH_HAS_READ_CURRENT_TIMER
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static inline int read_current_timer(unsigned long *timer_val)
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{
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*timer_val = get_cycles();
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return 0;
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}
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#endif /* _ASM_RISCV_TIMEX_H */
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