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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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f627217064
Intel BayTrail has almost the same Low Power Subsystem than Lynxpoint with few differences. Peripherals are clocked with different speeds (typically lower) and the clock is not always gated. To support this we add possibility to share a common fixed rate clock and make clock gating optional. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
54 lines
1.3 KiB
C
54 lines
1.3 KiB
C
/*
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* Intel Low Power Subsystem clocks.
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*
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* Copyright (C) 2013, Intel Corporation
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* Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
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* Heikki Krogerus <heikki.krogerus@linux.intel.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/platform_data/clk-lpss.h>
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#include <linux/platform_device.h>
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static int lpt_clk_probe(struct platform_device *pdev)
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{
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struct lpss_clk_data *drvdata;
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struct clk *clk;
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drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
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if (!drvdata)
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return -ENOMEM;
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/* LPSS free running clock */
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drvdata->name = "lpss_clk";
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clk = clk_register_fixed_rate(&pdev->dev, drvdata->name, NULL,
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CLK_IS_ROOT, 100000000);
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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drvdata->clk = clk;
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platform_set_drvdata(pdev, drvdata);
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return 0;
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}
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static struct platform_driver lpt_clk_driver = {
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.driver = {
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.name = "clk-lpt",
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.owner = THIS_MODULE,
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},
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.probe = lpt_clk_probe,
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};
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int __init lpt_clk_init(void)
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{
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return platform_driver_register(&lpt_clk_driver);
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}
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