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Add device tree bindings for Low Power Audio subsystem clock controller for Qualcomm Technology Inc's SDM845 SoCs. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
27 lines
795 B
Plaintext
27 lines
795 B
Plaintext
Qualcomm LPASS Clock Controller Binding
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-----------------------------------------------
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Required properties :
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- compatible : shall contain "qcom,sdm845-lpasscc"
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- #clock-cells : from common clock binding, shall contain 1.
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- reg : shall contain base register address and size,
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in the order
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Index-0 maps to LPASS_CC register region
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Index-1 maps to LPASS_QDSP6SS register region
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Optional properties :
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- reg-names : register names of LPASS domain
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"cc", "qdsp6ss".
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Example:
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The below node has to be defined in the cases where the LPASS peripheral loader
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would bring the subsystem out of reset.
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lpasscc: clock-controller@17014000 {
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compatible = "qcom,sdm845-lpasscc";
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reg = <0x17014000 0x1f004>, <0x17300000 0x200>;
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reg-names = "cc", "qdsp6ss";
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#clock-cells = <1>;
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};
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