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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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261 lines
7.3 KiB
C
261 lines
7.3 KiB
C
/*
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i2c-i810.c - Part of lm_sensors, Linux kernel modules for hardware
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monitoring
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Copyright (c) 1998, 1999, 2000 Frodo Looijaard <frodol@dds.nl>,
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Philip Edelbrock <phil@netroedge.com>,
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Ralph Metzler <rjkm@thp.uni-koeln.de>, and
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Mark D. Studebaker <mdsxyz123@yahoo.com>
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Based on code written by Ralph Metzler <rjkm@thp.uni-koeln.de> and
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Simon Vogl
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/*
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This interfaces to the I810/I815 to provide access to
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the DDC Bus and the I2C Bus.
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SUPPORTED DEVICES PCI ID
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i810AA 7121
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i810AB 7123
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i810E 7125
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i815 1132
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i845G 2562
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/i2c.h>
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#include <linux/i2c-algo-bit.h>
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#include <asm/io.h>
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/* GPIO register locations */
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#define I810_IOCONTROL_OFFSET 0x5000
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#define I810_HVSYNC 0x00 /* not used */
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#define I810_GPIOA 0x10
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#define I810_GPIOB 0x14
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/* bit locations in the registers */
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#define SCL_DIR_MASK 0x0001
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#define SCL_DIR 0x0002
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#define SCL_VAL_MASK 0x0004
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#define SCL_VAL_OUT 0x0008
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#define SCL_VAL_IN 0x0010
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#define SDA_DIR_MASK 0x0100
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#define SDA_DIR 0x0200
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#define SDA_VAL_MASK 0x0400
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#define SDA_VAL_OUT 0x0800
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#define SDA_VAL_IN 0x1000
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/* initialization states */
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#define INIT1 0x1
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#define INIT2 0x2
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#define INIT3 0x4
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/* delays */
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#define CYCLE_DELAY 10
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#define TIMEOUT (HZ / 2)
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static void __iomem *ioaddr;
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/* The i810 GPIO registers have individual masks for each bit
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so we never have to read before writing. Nice. */
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static void bit_i810i2c_setscl(void *data, int val)
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{
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writel((val ? SCL_VAL_OUT : 0) | SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK,
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ioaddr + I810_GPIOB);
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readl(ioaddr + I810_GPIOB); /* flush posted write */
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}
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static void bit_i810i2c_setsda(void *data, int val)
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{
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writel((val ? SDA_VAL_OUT : 0) | SDA_DIR | SDA_DIR_MASK | SDA_VAL_MASK,
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ioaddr + I810_GPIOB);
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readl(ioaddr + I810_GPIOB); /* flush posted write */
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}
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/* The GPIO pins are open drain, so the pins could always remain outputs.
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However, some chip versions don't latch the inputs unless they
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are set as inputs.
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We rely on the i2c-algo-bit routines to set the pins high before
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reading the input from other chips. Following guidance in the 815
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prog. ref. guide, we do a "dummy write" of 0 to the register before
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reading which forces the input value to be latched. We presume this
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applies to the 810 as well; shouldn't hurt anyway. This is necessary to get
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i2c_algo_bit bit_test=1 to pass. */
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static int bit_i810i2c_getscl(void *data)
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{
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writel(SCL_DIR_MASK, ioaddr + I810_GPIOB);
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writel(0, ioaddr + I810_GPIOB);
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return (0 != (readl(ioaddr + I810_GPIOB) & SCL_VAL_IN));
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}
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static int bit_i810i2c_getsda(void *data)
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{
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writel(SDA_DIR_MASK, ioaddr + I810_GPIOB);
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writel(0, ioaddr + I810_GPIOB);
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return (0 != (readl(ioaddr + I810_GPIOB) & SDA_VAL_IN));
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}
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static void bit_i810ddc_setscl(void *data, int val)
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{
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writel((val ? SCL_VAL_OUT : 0) | SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK,
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ioaddr + I810_GPIOA);
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readl(ioaddr + I810_GPIOA); /* flush posted write */
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}
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static void bit_i810ddc_setsda(void *data, int val)
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{
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writel((val ? SDA_VAL_OUT : 0) | SDA_DIR | SDA_DIR_MASK | SDA_VAL_MASK,
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ioaddr + I810_GPIOA);
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readl(ioaddr + I810_GPIOA); /* flush posted write */
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}
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static int bit_i810ddc_getscl(void *data)
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{
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writel(SCL_DIR_MASK, ioaddr + I810_GPIOA);
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writel(0, ioaddr + I810_GPIOA);
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return (0 != (readl(ioaddr + I810_GPIOA) & SCL_VAL_IN));
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}
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static int bit_i810ddc_getsda(void *data)
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{
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writel(SDA_DIR_MASK, ioaddr + I810_GPIOA);
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writel(0, ioaddr + I810_GPIOA);
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return (0 != (readl(ioaddr + I810_GPIOA) & SDA_VAL_IN));
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}
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static int config_i810(struct pci_dev *dev)
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{
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unsigned long cadr;
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/* map I810 memory */
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cadr = dev->resource[1].start;
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cadr += I810_IOCONTROL_OFFSET;
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cadr &= PCI_BASE_ADDRESS_MEM_MASK;
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ioaddr = ioremap_nocache(cadr, 0x1000);
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if (ioaddr) {
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bit_i810i2c_setscl(NULL, 1);
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bit_i810i2c_setsda(NULL, 1);
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bit_i810ddc_setscl(NULL, 1);
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bit_i810ddc_setsda(NULL, 1);
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return 0;
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}
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return -ENODEV;
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}
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static struct i2c_algo_bit_data i810_i2c_bit_data = {
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.setsda = bit_i810i2c_setsda,
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.setscl = bit_i810i2c_setscl,
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.getsda = bit_i810i2c_getsda,
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.getscl = bit_i810i2c_getscl,
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.udelay = CYCLE_DELAY,
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.mdelay = CYCLE_DELAY,
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.timeout = TIMEOUT,
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};
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static struct i2c_adapter i810_i2c_adapter = {
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.owner = THIS_MODULE,
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.name = "I810/I815 I2C Adapter",
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.algo_data = &i810_i2c_bit_data,
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};
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static struct i2c_algo_bit_data i810_ddc_bit_data = {
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.setsda = bit_i810ddc_setsda,
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.setscl = bit_i810ddc_setscl,
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.getsda = bit_i810ddc_getsda,
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.getscl = bit_i810ddc_getscl,
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.udelay = CYCLE_DELAY,
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.mdelay = CYCLE_DELAY,
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.timeout = TIMEOUT,
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};
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static struct i2c_adapter i810_ddc_adapter = {
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.owner = THIS_MODULE,
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.name = "I810/I815 DDC Adapter",
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.algo_data = &i810_ddc_bit_data,
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};
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static struct pci_device_id i810_ids[] __devinitdata = {
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810_IG1) },
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810_IG3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810E_IG) },
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82815_CGC) },
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845G_IG) },
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{ 0, },
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};
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MODULE_DEVICE_TABLE (pci, i810_ids);
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static int __devinit i810_probe(struct pci_dev *dev, const struct pci_device_id *id)
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{
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int retval;
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retval = config_i810(dev);
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if (retval)
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return retval;
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dev_info(&dev->dev, "i810/i815 i2c device found.\n");
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/* set up the sysfs linkage to our parent device */
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i810_i2c_adapter.dev.parent = &dev->dev;
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i810_ddc_adapter.dev.parent = &dev->dev;
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retval = i2c_bit_add_bus(&i810_i2c_adapter);
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if (retval)
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return retval;
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retval = i2c_bit_add_bus(&i810_ddc_adapter);
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if (retval)
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i2c_bit_del_bus(&i810_i2c_adapter);
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return retval;
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}
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static void __devexit i810_remove(struct pci_dev *dev)
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{
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i2c_bit_del_bus(&i810_ddc_adapter);
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i2c_bit_del_bus(&i810_i2c_adapter);
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iounmap(ioaddr);
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}
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static struct pci_driver i810_driver = {
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.name = "i810_smbus",
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.id_table = i810_ids,
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.probe = i810_probe,
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.remove = __devexit_p(i810_remove),
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};
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static int __init i2c_i810_init(void)
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{
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return pci_register_driver(&i810_driver);
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}
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static void __exit i2c_i810_exit(void)
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{
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pci_unregister_driver(&i810_driver);
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}
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MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
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"Philip Edelbrock <phil@netroedge.com>, "
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"Ralph Metzler <rjkm@thp.uni-koeln.de>, "
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"and Mark D. Studebaker <mdsxyz123@yahoo.com>");
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MODULE_DESCRIPTION("I810/I815 I2C/DDC driver");
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MODULE_LICENSE("GPL");
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module_init(i2c_i810_init);
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module_exit(i2c_i810_exit);
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