mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 06:16:46 +07:00
9f310dedfe
Commit 4c94c8b "ARM: tegra: update device trees for USB binding rework"
added regulator definitions for GPIO-controlled USB VBUS. However, none
of these contained the essential DT property enable-active-high. Add
this so that the regulator definitions are correct.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
429 lines
8.6 KiB
Plaintext
429 lines
8.6 KiB
Plaintext
/dts-v1/;
|
|
|
|
#include "tegra20.dtsi"
|
|
|
|
/ {
|
|
model = "Compulab TrimSlice board";
|
|
compatible = "compulab,trimslice", "nvidia,tegra20";
|
|
|
|
memory {
|
|
reg = <0x00000000 0x40000000>;
|
|
};
|
|
|
|
host1x {
|
|
hdmi {
|
|
status = "okay";
|
|
|
|
vdd-supply = <&hdmi_vdd_reg>;
|
|
pll-supply = <&hdmi_pll_reg>;
|
|
|
|
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
|
|
nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
|
|
GPIO_ACTIVE_HIGH>;
|
|
};
|
|
};
|
|
|
|
pinmux {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&state_default>;
|
|
|
|
state_default: pinmux {
|
|
ata {
|
|
nvidia,pins = "ata";
|
|
nvidia,function = "ide";
|
|
};
|
|
atb {
|
|
nvidia,pins = "atb", "gma";
|
|
nvidia,function = "sdio4";
|
|
};
|
|
atc {
|
|
nvidia,pins = "atc", "gmb";
|
|
nvidia,function = "nand";
|
|
};
|
|
atd {
|
|
nvidia,pins = "atd", "ate", "gme", "pta";
|
|
nvidia,function = "gmi";
|
|
};
|
|
cdev1 {
|
|
nvidia,pins = "cdev1";
|
|
nvidia,function = "plla_out";
|
|
};
|
|
cdev2 {
|
|
nvidia,pins = "cdev2";
|
|
nvidia,function = "pllp_out4";
|
|
};
|
|
crtp {
|
|
nvidia,pins = "crtp";
|
|
nvidia,function = "crt";
|
|
};
|
|
csus {
|
|
nvidia,pins = "csus";
|
|
nvidia,function = "vi_sensor_clk";
|
|
};
|
|
dap1 {
|
|
nvidia,pins = "dap1";
|
|
nvidia,function = "dap1";
|
|
};
|
|
dap2 {
|
|
nvidia,pins = "dap2";
|
|
nvidia,function = "dap2";
|
|
};
|
|
dap3 {
|
|
nvidia,pins = "dap3";
|
|
nvidia,function = "dap3";
|
|
};
|
|
dap4 {
|
|
nvidia,pins = "dap4";
|
|
nvidia,function = "dap4";
|
|
};
|
|
ddc {
|
|
nvidia,pins = "ddc";
|
|
nvidia,function = "i2c2";
|
|
};
|
|
dta {
|
|
nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
|
|
nvidia,function = "vi";
|
|
};
|
|
dtf {
|
|
nvidia,pins = "dtf";
|
|
nvidia,function = "i2c3";
|
|
};
|
|
gmc {
|
|
nvidia,pins = "gmc", "gmd";
|
|
nvidia,function = "sflash";
|
|
};
|
|
gpu {
|
|
nvidia,pins = "gpu";
|
|
nvidia,function = "uarta";
|
|
};
|
|
gpu7 {
|
|
nvidia,pins = "gpu7";
|
|
nvidia,function = "rtck";
|
|
};
|
|
gpv {
|
|
nvidia,pins = "gpv", "slxa", "slxk";
|
|
nvidia,function = "pcie";
|
|
};
|
|
hdint {
|
|
nvidia,pins = "hdint";
|
|
nvidia,function = "hdmi";
|
|
};
|
|
i2cp {
|
|
nvidia,pins = "i2cp";
|
|
nvidia,function = "i2cp";
|
|
};
|
|
irrx {
|
|
nvidia,pins = "irrx", "irtx";
|
|
nvidia,function = "uartb";
|
|
};
|
|
kbca {
|
|
nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
|
|
"kbce", "kbcf";
|
|
nvidia,function = "kbc";
|
|
};
|
|
lcsn {
|
|
nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
|
|
"ld3", "ld4", "ld5", "ld6", "ld7",
|
|
"ld8", "ld9", "ld10", "ld11", "ld12",
|
|
"ld13", "ld14", "ld15", "ld16", "ld17",
|
|
"ldc", "ldi", "lhp0", "lhp1", "lhp2",
|
|
"lhs", "lm0", "lm1", "lpp", "lpw0",
|
|
"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
|
|
"lsda", "lsdi", "lspi", "lvp0", "lvp1",
|
|
"lvs";
|
|
nvidia,function = "displaya";
|
|
};
|
|
owc {
|
|
nvidia,pins = "owc", "uac";
|
|
nvidia,function = "rsvd2";
|
|
};
|
|
pmc {
|
|
nvidia,pins = "pmc";
|
|
nvidia,function = "pwr_on";
|
|
};
|
|
rm {
|
|
nvidia,pins = "rm";
|
|
nvidia,function = "i2c1";
|
|
};
|
|
sdb {
|
|
nvidia,pins = "sdb", "sdc", "sdd";
|
|
nvidia,function = "pwm";
|
|
};
|
|
sdio1 {
|
|
nvidia,pins = "sdio1";
|
|
nvidia,function = "sdio1";
|
|
};
|
|
slxc {
|
|
nvidia,pins = "slxc", "slxd";
|
|
nvidia,function = "sdio3";
|
|
};
|
|
spdi {
|
|
nvidia,pins = "spdi", "spdo";
|
|
nvidia,function = "spdif";
|
|
};
|
|
spia {
|
|
nvidia,pins = "spia", "spib", "spic";
|
|
nvidia,function = "spi2";
|
|
};
|
|
spid {
|
|
nvidia,pins = "spid", "spie", "spif";
|
|
nvidia,function = "spi1";
|
|
};
|
|
spig {
|
|
nvidia,pins = "spig", "spih";
|
|
nvidia,function = "spi2_alt";
|
|
};
|
|
uaa {
|
|
nvidia,pins = "uaa", "uab", "uda";
|
|
nvidia,function = "ulpi";
|
|
};
|
|
uad {
|
|
nvidia,pins = "uad";
|
|
nvidia,function = "irda";
|
|
};
|
|
uca {
|
|
nvidia,pins = "uca", "ucb";
|
|
nvidia,function = "uartc";
|
|
};
|
|
conf_ata {
|
|
nvidia,pins = "ata", "atc", "atd", "ate",
|
|
"crtp", "dap2", "dap3", "dap4", "dta",
|
|
"dtb", "dtc", "dtd", "dte", "gmb",
|
|
"gme", "i2cp", "pta", "slxc", "slxd",
|
|
"spdi", "spdo", "uda";
|
|
nvidia,pull = <0>;
|
|
nvidia,tristate = <1>;
|
|
};
|
|
conf_atb {
|
|
nvidia,pins = "atb", "cdev1", "cdev2", "dap1",
|
|
"gma", "gmc", "gmd", "gpu", "gpu7",
|
|
"gpv", "sdio1", "slxa", "slxk", "uac";
|
|
nvidia,pull = <0>;
|
|
nvidia,tristate = <0>;
|
|
};
|
|
conf_ck32 {
|
|
nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
|
|
"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
|
|
nvidia,pull = <0>;
|
|
};
|
|
conf_csus {
|
|
nvidia,pins = "csus", "spia", "spib",
|
|
"spid", "spif";
|
|
nvidia,pull = <1>;
|
|
nvidia,tristate = <1>;
|
|
};
|
|
conf_ddc {
|
|
nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd";
|
|
nvidia,pull = <2>;
|
|
nvidia,tristate = <0>;
|
|
};
|
|
conf_hdint {
|
|
nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
|
|
"lpw1", "lsc1", "lsck", "lsda", "lsdi",
|
|
"lvp0", "pmc";
|
|
nvidia,tristate = <1>;
|
|
};
|
|
conf_irrx {
|
|
nvidia,pins = "irrx", "irtx", "kbca", "kbcb",
|
|
"kbcc", "kbcd", "kbce", "kbcf", "owc",
|
|
"spic", "spie", "spig", "spih", "uaa",
|
|
"uab", "uad", "uca", "ucb";
|
|
nvidia,pull = <2>;
|
|
nvidia,tristate = <1>;
|
|
};
|
|
conf_lc {
|
|
nvidia,pins = "lc", "ls";
|
|
nvidia,pull = <2>;
|
|
};
|
|
conf_ld0 {
|
|
nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
|
|
"ld5", "ld6", "ld7", "ld8", "ld9",
|
|
"ld10", "ld11", "ld12", "ld13", "ld14",
|
|
"ld15", "ld16", "ld17", "ldi", "lhp0",
|
|
"lhp1", "lhp2", "lhs", "lm0", "lpp",
|
|
"lpw0", "lpw2", "lsc0", "lspi", "lvp1",
|
|
"lvs", "sdb";
|
|
nvidia,tristate = <0>;
|
|
};
|
|
conf_ld17_0 {
|
|
nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
|
|
"ld23_22";
|
|
nvidia,pull = <1>;
|
|
};
|
|
conf_spif {
|
|
nvidia,pins = "spif";
|
|
nvidia,pull = <1>;
|
|
nvidia,tristate = <0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
i2s@70002800 {
|
|
status = "okay";
|
|
};
|
|
|
|
serial@70006000 {
|
|
status = "okay";
|
|
};
|
|
|
|
dvi_ddc: i2c@7000c000 {
|
|
status = "okay";
|
|
clock-frequency = <100000>;
|
|
};
|
|
|
|
spi@7000c380 {
|
|
status = "okay";
|
|
spi-max-frequency = <48000000>;
|
|
spi-flash@0 {
|
|
compatible = "winbond,w25q80bl";
|
|
reg = <0>;
|
|
spi-max-frequency = <48000000>;
|
|
};
|
|
};
|
|
|
|
hdmi_ddc: i2c@7000c400 {
|
|
status = "okay";
|
|
clock-frequency = <100000>;
|
|
};
|
|
|
|
i2c@7000c500 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
codec: codec@1a {
|
|
compatible = "ti,tlv320aic23";
|
|
reg = <0x1a>;
|
|
};
|
|
|
|
rtc@56 {
|
|
compatible = "emmicro,em3027";
|
|
reg = <0x56>;
|
|
};
|
|
};
|
|
|
|
pmc {
|
|
nvidia,suspend-mode = <2>;
|
|
nvidia,cpu-pwr-good-time = <5000>;
|
|
nvidia,cpu-pwr-off-time = <5000>;
|
|
nvidia,core-pwr-good-time = <3845 3845>;
|
|
nvidia,core-pwr-off-time = <3875>;
|
|
nvidia,sys-clock-req-active-high;
|
|
};
|
|
|
|
usb@c5000000 {
|
|
status = "okay";
|
|
nvidia,vbus-gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
usb-phy@c5000000 {
|
|
status = "okay";
|
|
vbus-supply = <&vbus_reg>;
|
|
};
|
|
|
|
usb@c5004000 {
|
|
status = "okay";
|
|
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
|
|
GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
usb-phy@c5004000 {
|
|
status = "okay";
|
|
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
|
|
GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
usb@c5008000 {
|
|
status = "okay";
|
|
};
|
|
|
|
usb-phy@c5008000 {
|
|
status = "okay";
|
|
};
|
|
|
|
sdhci@c8000000 {
|
|
status = "okay";
|
|
bus-width = <4>;
|
|
};
|
|
|
|
sdhci@c8000600 {
|
|
status = "okay";
|
|
cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>;
|
|
wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
|
|
bus-width = <4>;
|
|
};
|
|
|
|
clocks {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
clk32k_in: clock {
|
|
compatible = "fixed-clock";
|
|
reg=<0>;
|
|
#clock-cells = <0>;
|
|
clock-frequency = <32768>;
|
|
};
|
|
};
|
|
|
|
gpio-keys {
|
|
compatible = "gpio-keys";
|
|
|
|
power {
|
|
label = "Power";
|
|
gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>;
|
|
linux,code = <116>; /* KEY_POWER */
|
|
gpio-key,wakeup;
|
|
};
|
|
};
|
|
|
|
poweroff {
|
|
compatible = "gpio-poweroff";
|
|
gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
regulators {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
hdmi_vdd_reg: regulator@0 {
|
|
compatible = "regulator-fixed";
|
|
reg = <0>;
|
|
regulator-name = "avdd_hdmi";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
hdmi_pll_reg: regulator@1 {
|
|
compatible = "regulator-fixed";
|
|
reg = <1>;
|
|
regulator-name = "avdd_hdmi_pll";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vbus_reg: regulator@2 {
|
|
compatible = "regulator-fixed";
|
|
reg = <2>;
|
|
regulator-name = "usb1_vbus";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
enable-active-high;
|
|
gpio = <&gpio 170 0>; /* PV2 */
|
|
};
|
|
};
|
|
|
|
sound {
|
|
compatible = "nvidia,tegra-audio-trimslice";
|
|
nvidia,i2s-controller = <&tegra_i2s1>;
|
|
nvidia,audio-codec = <&codec>;
|
|
|
|
clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
|
|
<&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
|
|
<&tegra_car TEGRA20_CLK_CDEV1>;
|
|
clock-names = "pll_a", "pll_a_out0", "mclk";
|
|
};
|
|
};
|